vxge: always enable hardware time stamp
Hardware time stamp calculation can only be enabled by the privileged function. Enable it always by default and simply use the ethtool interface to set a flag to indicate whether or not the respective function driver should indicate the timestamp along with the received packet. Also, make certain fields in vxge_hw_device_config bit-fields to reduce the size of the struct. Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -412,44 +412,48 @@ struct vxge_hw_vp_config {
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* See also: struct vxge_hw_tim_intr_config{}.
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*/
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struct vxge_hw_device_config {
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u32 dma_blockpool_initial;
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u32 dma_blockpool_max;
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#define VXGE_HW_MIN_DMA_BLOCK_POOL_SIZE 0
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#define VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE 0
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#define VXGE_HW_INCR_DMA_BLOCK_POOL_SIZE 4
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#define VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE 4096
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u32 device_poll_millis;
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#define VXGE_HW_MIN_DEVICE_POLL_MILLIS 1
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#define VXGE_HW_MAX_DEVICE_POLL_MILLIS 100000
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#define VXGE_HW_DEF_DEVICE_POLL_MILLIS 1000
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#define VXGE_HW_MAX_PAYLOAD_SIZE_512 2
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u32 dma_blockpool_initial;
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u32 dma_blockpool_max;
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#define VXGE_HW_MIN_DMA_BLOCK_POOL_SIZE 0
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#define VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE 0
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#define VXGE_HW_INCR_DMA_BLOCK_POOL_SIZE 4
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#define VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE 4096
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u32 intr_mode;
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#define VXGE_HW_INTR_MODE_IRQLINE 0
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#define VXGE_HW_INTR_MODE_MSIX 1
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#define VXGE_HW_INTR_MODE_MSIX_ONE_SHOT 2
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#define VXGE_HW_MAX_PAYLOAD_SIZE_512 2
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#define VXGE_HW_INTR_MODE_DEF 0
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u32 intr_mode:2,
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#define VXGE_HW_INTR_MODE_IRQLINE 0
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#define VXGE_HW_INTR_MODE_MSIX 1
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#define VXGE_HW_INTR_MODE_MSIX_ONE_SHOT 2
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u32 rth_en;
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#define VXGE_HW_RTH_DISABLE 0
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#define VXGE_HW_RTH_ENABLE 1
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#define VXGE_HW_RTH_DEFAULT 0
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#define VXGE_HW_INTR_MODE_DEF 0
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u32 rth_it_type;
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#define VXGE_HW_RTH_IT_TYPE_SOLO_IT 0
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#define VXGE_HW_RTH_IT_TYPE_MULTI_IT 1
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#define VXGE_HW_RTH_IT_TYPE_DEFAULT 0
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rth_en:1,
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#define VXGE_HW_RTH_DISABLE 0
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#define VXGE_HW_RTH_ENABLE 1
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#define VXGE_HW_RTH_DEFAULT 0
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u32 rts_mac_en;
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rth_it_type:1,
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#define VXGE_HW_RTH_IT_TYPE_SOLO_IT 0
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#define VXGE_HW_RTH_IT_TYPE_MULTI_IT 1
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#define VXGE_HW_RTH_IT_TYPE_DEFAULT 0
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rts_mac_en:1,
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#define VXGE_HW_RTS_MAC_DISABLE 0
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#define VXGE_HW_RTS_MAC_ENABLE 1
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#define VXGE_HW_RTS_MAC_DEFAULT 0
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struct vxge_hw_vp_config vp_config[VXGE_HW_MAX_VIRTUAL_PATHS];
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u32 device_poll_millis;
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#define VXGE_HW_MIN_DEVICE_POLL_MILLIS 1
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#define VXGE_HW_MAX_DEVICE_POLL_MILLIS 100000
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#define VXGE_HW_DEF_DEVICE_POLL_MILLIS 1000
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hwts_en:1;
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#define VXGE_HW_HWTS_DISABLE 0
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#define VXGE_HW_HWTS_ENABLE 1
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#define VXGE_HW_HWTS_DEFAULT 1
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struct vxge_hw_vp_config vp_config[VXGE_HW_MAX_VIRTUAL_PATHS];
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};
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/**
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@ -3112,8 +3112,7 @@ vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
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return net_stats;
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}
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static enum vxge_hw_status vxge_timestamp_config(struct vxgedev *vdev,
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int enable)
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static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
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{
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enum vxge_hw_status status;
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u64 val64;
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@ -3123,27 +3122,24 @@ static enum vxge_hw_status vxge_timestamp_config(struct vxgedev *vdev,
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* required for the driver to load (due to a hardware bug),
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* there is no need to do anything special here.
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*/
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if (enable)
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val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
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VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
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VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
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else
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val64 = 0;
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val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
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VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
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VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
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status = vxge_hw_mgmt_reg_write(vdev->devh,
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status = vxge_hw_mgmt_reg_write(devh,
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vxge_hw_mgmt_reg_type_mrpcim,
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0,
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offsetof(struct vxge_hw_mrpcim_reg,
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xmac_timestamp),
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val64);
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vxge_hw_device_flush_io(vdev->devh);
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vxge_hw_device_flush_io(devh);
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devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
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return status;
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}
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static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
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{
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struct hwtstamp_config config;
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enum vxge_hw_status status;
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int i;
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if (copy_from_user(&config, data, sizeof(config)))
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@ -3164,10 +3160,6 @@ static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
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switch (config.rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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status = vxge_timestamp_config(vdev, 0);
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if (status != VXGE_HW_OK)
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return -EFAULT;
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vdev->rx_hwts = 0;
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config.rx_filter = HWTSTAMP_FILTER_NONE;
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break;
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@ -3186,8 +3178,7 @@ static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
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case HWTSTAMP_FILTER_PTP_V2_EVENT:
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case HWTSTAMP_FILTER_PTP_V2_SYNC:
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case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
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status = vxge_timestamp_config(vdev, 1);
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if (status != VXGE_HW_OK)
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if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
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return -EFAULT;
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vdev->rx_hwts = 1;
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@ -4575,6 +4566,24 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
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goto _exit4;
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}
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/* Always enable HWTS. This will always cause the FCS to be invalid,
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* due to the fact that HWTS is using the FCS as the location of the
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* timestamp. The HW FCS checking will still correctly determine if
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* there is a valid checksum, and the FCS is being removed by the driver
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* anyway. So no fucntionality is being lost. Since it is always
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* enabled, we now simply use the ioctl call to set whether or not the
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* driver should be paying attention to the HWTS.
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*/
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if (is_privileged == VXGE_HW_OK) {
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status = vxge_timestamp_config(hldev);
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if (status != VXGE_HW_OK) {
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vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
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VXGE_DRIVER_NAME);
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ret = -EFAULT;
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goto _exit4;
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}
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}
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vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
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/* set private device info */
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@ -240,7 +240,7 @@ struct vxge_hw_tim_intr_config {
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u32 btimer_val;
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#define VXGE_HW_MIN_TIM_BTIMER_VAL 0
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#define VXGE_HW_MAX_TIM_BTIMER_VAL 67108864
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#define VXGE_HW_USE_FLASH_DEFAULT 0xffffffff
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#define VXGE_HW_USE_FLASH_DEFAULT (~0)
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u32 timer_ac_en;
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#define VXGE_HW_TIM_TIMER_AC_ENABLE 1
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