drm/amd/display: Added new DMUB boot option for power optimization
[Why] During Z10, root clock gating and memory low power registers needs to to be restored if optimization is enabled in driver. [How] Added new DMUB boot option for root clock gating and memory low power. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -238,6 +238,7 @@ struct dmub_srv_hw_params {
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bool load_inst_const;
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bool load_inst_const;
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bool skip_panel_power_sequence;
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bool skip_panel_power_sequence;
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bool disable_z10;
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bool disable_z10;
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bool power_optimization;
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bool dpia_supported;
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bool dpia_supported;
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bool disable_dpia;
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bool disable_dpia;
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};
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};
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@ -340,6 +340,7 @@ void dmub_dcn31_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmu
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boot_options.bits.z10_disable = params->disable_z10;
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boot_options.bits.z10_disable = params->disable_z10;
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boot_options.bits.dpia_supported = params->dpia_supported;
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boot_options.bits.dpia_supported = params->dpia_supported;
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boot_options.bits.enable_dpia = params->disable_dpia ? 0 : 1;
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boot_options.bits.enable_dpia = params->disable_dpia ? 0 : 1;
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boot_options.bits.power_optimization = params->power_optimization;
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boot_options.bits.sel_mux_phy_c_d_phy_f_g = (dmub->asic == DMUB_ASIC_DCN31B) ? 1 : 0;
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boot_options.bits.sel_mux_phy_c_d_phy_f_g = (dmub->asic == DMUB_ASIC_DCN31B) ? 1 : 0;
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