From cd9fdd06b0e8aafc715f239153ff41cbf12c991a Mon Sep 17 00:00:00 2001 From: Yassine Oudjana Date: Sun, 24 Apr 2022 12:46:45 +0400 Subject: [PATCH] dt-bindings: arm: mediatek: topckgen: Convert to DT schema Convert topckgen bindings to DT schema format. MT2701, MT7623 and MT7629 device trees currently have the syscon compatible without it being mentioned in the old DT bindings file which introduces dtbs_check errors when converting to DT schema as-is, so mediatek,mt2701-topckgen and mediatek,mt7629-topckgen are placed in the last items list with the syscon compatible, and syscon is added to the mediatek,mt7623-topckgen list. Signed-off-by: Yassine Oudjana Reviewed-by: Krzysztof Kozlowski Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20220424084647.76577-2-y.oudjana@protonmail.com --- .../arm/mediatek/mediatek,topckgen.txt | 35 ----------- .../bindings/clock/mediatek,topckgen.yaml | 61 +++++++++++++++++++ 2 files changed, 61 insertions(+), 35 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt create mode 100644 Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt deleted file mode 100644 index b82422bb717f..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt +++ /dev/null @@ -1,35 +0,0 @@ -Mediatek topckgen controller -============================ - -The Mediatek topckgen controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be one of: - - "mediatek,mt2701-topckgen" - - "mediatek,mt2712-topckgen", "syscon" - - "mediatek,mt6765-topckgen", "syscon" - - "mediatek,mt6779-topckgen", "syscon" - - "mediatek,mt6797-topckgen" - - "mediatek,mt7622-topckgen" - - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen" - - "mediatek,mt7629-topckgen" - - "mediatek,mt7986-topckgen", "syscon" - - "mediatek,mt8135-topckgen" - - "mediatek,mt8167-topckgen", "syscon" - - "mediatek,mt8173-topckgen" - - "mediatek,mt8183-topckgen", "syscon" - - "mediatek,mt8516-topckgen" -- #clock-cells: Must be 1 - -The topckgen controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -topckgen: power-controller@10000000 { - compatible = "mediatek,mt8173-topckgen"; - reg = <0 0x10000000 0 0x1000>; - #clock-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml new file mode 100644 index 000000000000..5b8b37a2e594 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/clock/mediatek,topckgen.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MediaTek Top Clock Generator Controller + +maintainers: + - Michael Turquette + - Stephen Boyd + +description: + The Mediatek topckgen controller provides various clocks to the system. + The clock values can be found in . + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt6797-topckgen + - mediatek,mt7622-topckgen + - mediatek,mt8135-topckgen + - mediatek,mt8173-topckgen + - mediatek,mt8516-topckgen + - items: + - const: mediatek,mt7623-topckgen + - const: mediatek,mt2701-topckgen + - const: syscon + - items: + - enum: + - mediatek,mt2701-topckgen + - mediatek,mt2712-topckgen + - mediatek,mt6765-topckgen + - mediatek,mt6779-topckgen + - mediatek,mt7629-topckgen + - mediatek,mt7986-topckgen + - mediatek,mt8167-topckgen + - mediatek,mt8183-topckgen + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + topckgen: clock-controller@10000000 { + compatible = "mediatek,mt8173-topckgen"; + reg = <0x10000000 0x1000>; + #clock-cells = <1>; + };