drm/amdgpu: optimize amdgpu_device_vram_access a bit.
Only write the _HI register when necessary. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Jonathan Kim <Jonathan.Kim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -183,20 +183,25 @@ bool amdgpu_device_supports_baco(struct drm_device *dev)
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void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
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uint32_t *buf, size_t size, bool write)
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{
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uint64_t last;
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unsigned long flags;
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uint32_t hi = ~0;
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uint64_t last;
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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for (last = pos + size; pos < last; pos += 4) {
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uint32_t tmp = pos >> 31;
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last = size - 4;
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for (last += pos; pos <= last; pos += 4) {
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)pos) | 0x80000000);
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WREG32_NO_KIQ(mmMM_INDEX_HI, pos >> 31);
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if (tmp != hi) {
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WREG32_NO_KIQ(mmMM_INDEX_HI, tmp);
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hi = tmp;
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}
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if (write)
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WREG32_NO_KIQ(mmMM_DATA, *buf++);
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else
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*buf++ = RREG32_NO_KIQ(mmMM_DATA);
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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}
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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}
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/*
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