ARM: 9270/1: vfp: Add hwcap for FEAT_FHM
Floating-point half-precision multiplication (FHM) is a feature present in AArch32 state for Armv8 and is represented by ISAR6.FHM identification register. This feature denotes the presence of VFMAL and VMFSL instructions and hence adding a hwcap will enable the userspace to check it before trying to use those instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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@ -31,6 +31,7 @@
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#define HWCAP_FPHP (1 << 22)
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#define HWCAP_FPHP (1 << 22)
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#define HWCAP_ASIMDHP (1 << 23)
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#define HWCAP_ASIMDHP (1 << 23)
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#define HWCAP_ASIMDDP (1 << 24)
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#define HWCAP_ASIMDDP (1 << 24)
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#define HWCAP_ASIMDFHM (1 << 25)
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/*
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/*
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* HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2
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* HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2
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@ -1252,6 +1252,7 @@ static const char *hwcap_str[] = {
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"fphp",
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"fphp",
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"asimdhp",
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"asimdhp",
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"asimddp",
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"asimddp",
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"asimdfhm",
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NULL
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NULL
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};
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};
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@ -845,6 +845,12 @@ static int __init vfp_init(void)
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isar6 = read_cpuid_ext(CPUID_EXT_ISAR6);
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isar6 = read_cpuid_ext(CPUID_EXT_ISAR6);
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if (cpuid_feature_extract_field(isar6, 4) == 0x1)
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if (cpuid_feature_extract_field(isar6, 4) == 0x1)
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elf_hwcap |= HWCAP_ASIMDDP;
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elf_hwcap |= HWCAP_ASIMDDP;
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/*
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* Check for the presence of Advanced SIMD Floating point
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* half-precision multiplication instructions.
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*/
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if (cpuid_feature_extract_field(isar6, 8) == 0x1)
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elf_hwcap |= HWCAP_ASIMDFHM;
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/* Extract the architecture version on pre-cpuid scheme */
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/* Extract the architecture version on pre-cpuid scheme */
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} else {
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} else {
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