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media: drm/mediatek: Get rid of mtk_smi_larb_get/put

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MediaTek IOMMU has already added the device_link between the consumer
and smi-larb device. If the drm device calls the pm_runtime_get_sync,
the smi-larb's pm_runtime_get_sync also be called automatically.

CC: CK Hu <ck.hu@mediatek.com>
CC: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de> # BPI-R2/MT7623
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Yong Wu 2022-01-17 08:05:06 +01:00 committed by Mauro Carvalho Chehab
parent 5db12f5d84
commit ce6c24baaa
4 changed files with 3 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
View File

@ -12,7 +12,6 @@
#include <linux/soc/mediatek/mtk-mutex.h> #include <linux/soc/mediatek/mtk-mutex.h>
#include <asm/barrier.h> #include <asm/barrier.h>
#include <soc/mediatek/smi.h>
#include <drm/drm_atomic.h> #include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h> #include <drm/drm_atomic_helper.h>
@ -661,22 +660,14 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);
ret = mtk_smi_larb_get(comp->larb_dev);
if (ret) {
DRM_ERROR("Failed to get larb: %d\n", ret);
return;
}
ret = pm_runtime_resume_and_get(comp->dev); ret = pm_runtime_resume_and_get(comp->dev);
if (ret < 0) { if (ret < 0) {
mtk_smi_larb_put(comp->larb_dev);
DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret); DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret);
return; return;
} }
ret = mtk_crtc_ddp_hw_init(mtk_crtc); ret = mtk_crtc_ddp_hw_init(mtk_crtc);
if (ret) { if (ret) {
mtk_smi_larb_put(comp->larb_dev);
pm_runtime_put(comp->dev); pm_runtime_put(comp->dev);
return; return;
} }
@ -713,7 +704,6 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
drm_crtc_vblank_off(crtc); drm_crtc_vblank_off(crtc);
mtk_crtc_ddp_hw_fini(mtk_crtc); mtk_crtc_ddp_hw_fini(mtk_crtc);
mtk_smi_larb_put(comp->larb_dev);
ret = pm_runtime_put(comp->dev); ret = pm_runtime_put(comp->dev);
if (ret < 0) if (ret < 0)
DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret); DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret);

36
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
View File

@ -447,37 +447,15 @@ unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
return ret; return ret;
} }
static int mtk_ddp_get_larb_dev(struct device_node *node, struct mtk_ddp_comp *comp,
struct device *dev)
{
struct device_node *larb_node;
struct platform_device *larb_pdev;
larb_node = of_parse_phandle(node, "mediatek,larb", 0);
if (!larb_node) {
dev_err(dev, "Missing mediadek,larb phandle in %pOF node\n", node);
return -EINVAL;
}
larb_pdev = of_find_device_by_node(larb_node);
if (!larb_pdev) {
dev_warn(dev, "Waiting for larb device %pOF\n", larb_node);
of_node_put(larb_node);
return -EPROBE_DEFER;
}
of_node_put(larb_node);
comp->larb_dev = &larb_pdev->dev;
return 0;
}
int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
enum mtk_ddp_comp_id comp_id) enum mtk_ddp_comp_id comp_id)
{ {
struct platform_device *comp_pdev; struct platform_device *comp_pdev;
enum mtk_ddp_comp_type type; enum mtk_ddp_comp_type type;
struct mtk_ddp_comp_dev *priv; struct mtk_ddp_comp_dev *priv;
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
int ret; int ret;
#endif
if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX) if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX)
return -EINVAL; return -EINVAL;
@ -493,16 +471,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
} }
comp->dev = &comp_pdev->dev; comp->dev = &comp_pdev->dev;
/* Only DMA capable components need the LARB property */
if (type == MTK_DISP_OVL ||
type == MTK_DISP_OVL_2L ||
type == MTK_DISP_RDMA ||
type == MTK_DISP_WDMA) {
ret = mtk_ddp_get_larb_dev(node, comp, comp->dev);
if (ret)
return ret;
}
if (type == MTK_DISP_AAL || if (type == MTK_DISP_AAL ||
type == MTK_DISP_BLS || type == MTK_DISP_BLS ||
type == MTK_DISP_CCORR || type == MTK_DISP_CCORR ||

1
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
View File

@ -71,7 +71,6 @@ struct mtk_ddp_comp_funcs {
struct mtk_ddp_comp { struct mtk_ddp_comp {
struct device *dev; struct device *dev;
int irq; int irq;
struct device *larb_dev;
enum mtk_ddp_comp_id id; enum mtk_ddp_comp_id id;
const struct mtk_ddp_comp_funcs *funcs; const struct mtk_ddp_comp_funcs *funcs;
}; };

5
drivers/gpu/drm/mediatek/mtk_drm_drv.c
View File

@ -645,11 +645,8 @@ err_pm:
pm_runtime_disable(dev); pm_runtime_disable(dev);
err_node: err_node:
of_node_put(private->mutex_node); of_node_put(private->mutex_node);
for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) { for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
of_node_put(private->comp_node[i]); of_node_put(private->comp_node[i]);
if (private->ddp_comp[i].larb_dev)
put_device(private->ddp_comp[i].larb_dev);
}
return ret; return ret;
} }