tools/power/turbostat: Reorder some functions
Reorder some functions to solve code depdency introduced by next patch. No functional change. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Reviewed-by: Len Brown <len.brown@intel.com>
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@ -4878,92 +4878,6 @@ void rapl_probe_amd(void)
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fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
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}
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/*
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* probe_rapl()
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*
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* sets rapl_power_units, rapl_energy_units, rapl_time_units
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*/
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void probe_rapl(void)
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{
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if (!platform->rapl_msrs)
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return;
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if (genuine_intel)
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rapl_probe_intel();
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if (authentic_amd || hygon_genuine)
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rapl_probe_amd();
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}
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void probe_thermal(void)
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{
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if (!access("/sys/devices/system/cpu/cpu0/thermal_throttle/core_throttle_count", R_OK))
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BIC_PRESENT(BIC_CORE_THROT_CNT);
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else
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BIC_NOT_PRESENT(BIC_CORE_THROT_CNT);
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}
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int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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{
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unsigned long long msr;
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unsigned int dts, dts2;
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int cpu;
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UNUSED(c);
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UNUSED(p);
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if (!(do_dts || do_ptm))
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return 0;
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cpu = t->cpu_id;
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/* DTS is per-core, no need to print for each thread */
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if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
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return 0;
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if (cpu_migrate(cpu)) {
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fprintf(outf, "print_thermal: Could not migrate to CPU %d\n", cpu);
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return -1;
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}
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if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
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if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", cpu, msr, tj_max - dts);
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if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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dts2 = (msr >> 8) & 0x7F;
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fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
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cpu, msr, tj_max - dts, tj_max - dts2);
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}
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if (do_dts && debug) {
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unsigned int resolution;
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if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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resolution = (msr >> 27) & 0xF;
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fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
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cpu, msr, tj_max - dts, resolution);
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if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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dts2 = (msr >> 8) & 0x7F;
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fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
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cpu, msr, tj_max - dts, tj_max - dts2);
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}
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return 0;
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}
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void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
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{
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fprintf(outf, "cpu%d: %s: %sabled (%0.3f Watts, %f sec, clamp %sabled)\n",
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@ -5095,29 +5009,20 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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return 0;
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}
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int get_cpu_type(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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/*
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* probe_rapl()
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*
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* sets rapl_power_units, rapl_energy_units, rapl_time_units
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*/
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void probe_rapl(void)
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{
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unsigned int eax, ebx, ecx, edx;
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if (!platform->rapl_msrs)
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return;
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UNUSED(c);
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UNUSED(p);
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if (!genuine_intel)
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return 0;
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if (cpu_migrate(t->cpu_id)) {
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fprintf(outf, "Could not migrate to CPU %d\n", t->cpu_id);
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return -1;
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}
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if (max_level < 0x1a)
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return 0;
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__cpuid(0x1a, eax, ebx, ecx, edx);
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eax = (eax >> 24) & 0xFF;
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if (eax == 0x20)
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t->is_atom = true;
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return 0;
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if (genuine_intel)
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rapl_probe_intel();
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if (authentic_amd || hygon_genuine)
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rapl_probe_amd();
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}
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/*
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@ -5200,6 +5105,101 @@ guess:
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return 0;
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}
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int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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{
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unsigned long long msr;
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unsigned int dts, dts2;
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int cpu;
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UNUSED(c);
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UNUSED(p);
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if (!(do_dts || do_ptm))
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return 0;
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cpu = t->cpu_id;
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/* DTS is per-core, no need to print for each thread */
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if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
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return 0;
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if (cpu_migrate(cpu)) {
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fprintf(outf, "print_thermal: Could not migrate to CPU %d\n", cpu);
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return -1;
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}
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if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
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if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", cpu, msr, tj_max - dts);
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if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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dts2 = (msr >> 8) & 0x7F;
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fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
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cpu, msr, tj_max - dts, tj_max - dts2);
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}
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if (do_dts && debug) {
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unsigned int resolution;
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if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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resolution = (msr >> 27) & 0xF;
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fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
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cpu, msr, tj_max - dts, resolution);
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if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
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return 0;
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dts = (msr >> 16) & 0x7F;
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dts2 = (msr >> 8) & 0x7F;
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fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
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cpu, msr, tj_max - dts, tj_max - dts2);
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}
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return 0;
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}
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void probe_thermal(void)
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{
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if (!access("/sys/devices/system/cpu/cpu0/thermal_throttle/core_throttle_count", R_OK))
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BIC_PRESENT(BIC_CORE_THROT_CNT);
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else
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BIC_NOT_PRESENT(BIC_CORE_THROT_CNT);
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}
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int get_cpu_type(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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{
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unsigned int eax, ebx, ecx, edx;
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UNUSED(c);
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UNUSED(p);
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if (!genuine_intel)
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return 0;
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if (cpu_migrate(t->cpu_id)) {
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fprintf(outf, "Could not migrate to CPU %d\n", t->cpu_id);
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return -1;
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}
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if (max_level < 0x1a)
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return 0;
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__cpuid(0x1a, eax, ebx, ecx, edx);
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eax = (eax >> 24) & 0xFF;
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if (eax == 0x20)
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t->is_atom = true;
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return 0;
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}
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void decode_feature_control_msr(void)
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{
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unsigned long long msr;
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