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sh_eth: add sh_eth_cpu_data::no_tx_cntrs flag

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RZ/A1H (R7S72100) Ether controller doesn't  seem to have the TX counter
registers like TROCR/CDCR/LCCR (or at least they are still undocumented
like some TSU registers), so we bail out of sh_eth_get_stats() early in
this case.  Currently we are calling sh_eth_is_rz_fast_ether() in order
to check for this, but it would be simpler to check the new 'no_tx_cntrs'
bitfield in the 'struct sh_eth_cpu_data'; then we'd be able  to remove
sh_eth_is_rz_fast_ether() as there would be no callers left...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov 2018-03-24 23:11:19 +03:00 committed by David S. Miller
parent 246e30cc4f
commit ce9134dff6
2 changed files with 3 additions and 6 deletions
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8
drivers/net/ethernet/renesas/sh_eth.c
View File

@ -455,11 +455,6 @@ static bool sh_eth_is_gether(struct sh_eth_private *mdp)
return mdp->reg_offset == sh_eth_offset_gigabit;
}
static bool sh_eth_is_rz_fast_ether(struct sh_eth_private *mdp)
{
return mdp->reg_offset == sh_eth_offset_fast_rz;
}
static void sh_eth_select_mii(struct net_device *ndev)
{
struct sh_eth_private *mdp = netdev_priv(ndev);
@ -614,6 +609,7 @@ static struct sh_eth_cpu_data r7s72100_data = {
.xdfar_rw = 1,
.hw_checksum = 1,
.tsu = 1,
.no_tx_cntrs = 1,
};
static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
@ -2534,7 +2530,7 @@ static struct net_device_stats *sh_eth_get_stats(struct net_device *ndev)
{
struct sh_eth_private *mdp = netdev_priv(ndev);
if (sh_eth_is_rz_fast_ether(mdp))
if (mdp->cd->no_tx_cntrs)
return &ndev->stats;
if (!mdp->is_opened)

1
drivers/net/ethernet/renesas/sh_eth.h
View File

@ -514,6 +514,7 @@ struct sh_eth_cpu_data {
unsigned rmiimode:1; /* EtherC has RMIIMODE register */
unsigned rtrate:1; /* EtherC has RTRATE register */
unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */
unsigned no_tx_cntrs:1; /* EtherC DOES NOT have TX error counters */
unsigned dual_port:1; /* Dual EtherC/E-DMAC */
};