Merge branch 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull core/iommu changes from Ingo Molnar. * 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: iommu/dmar: Use pr_format() instead of PREFIX to tidy up pr_*() calls iommu/dmar: Reserve mmio space used by the IOMMU, if the BIOS forgets to iommu/dmar: Replace printks with appropriate pr_*()
This commit is contained in:
commit
ceee0e95b6
@ -26,6 +26,8 @@
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* These routines are used by both DMA-remapping and Interrupt-remapping
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt /* has to precede printk.h */
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#include <linux/pci.h>
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#include <linux/dmar.h>
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#include <linux/iova.h>
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@ -39,8 +41,6 @@
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#include <asm/irq_remapping.h>
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#include <asm/iommu_table.h>
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#define PREFIX "DMAR: "
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/* No locks are needed as DMA remapping hardware unit
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* list is constructed at boot time and hotplug of
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* these units are not supported by the architecture.
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@ -83,16 +83,12 @@ static int __init dmar_parse_one_dev_scope(struct acpi_dmar_device_scope *scope,
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* ignore it
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*/
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if (!bus) {
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printk(KERN_WARNING
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PREFIX "Device scope bus [%d] not found\n",
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scope->bus);
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pr_warn("Device scope bus [%d] not found\n", scope->bus);
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break;
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}
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pdev = pci_get_slot(bus, PCI_DEVFN(path->dev, path->fn));
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if (!pdev) {
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printk(KERN_WARNING PREFIX
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"Device scope device [%04x:%02x:%02x.%02x] not found\n",
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segment, bus->number, path->dev, path->fn);
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/* warning will be printed below */
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break;
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}
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path ++;
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@ -100,8 +96,7 @@ static int __init dmar_parse_one_dev_scope(struct acpi_dmar_device_scope *scope,
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bus = pdev->subordinate;
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}
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if (!pdev) {
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printk(KERN_WARNING PREFIX
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"Device scope device [%04x:%02x:%02x.%02x] not found\n",
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pr_warn("Device scope device [%04x:%02x:%02x.%02x] not found\n",
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segment, scope->bus, path->dev, path->fn);
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*dev = NULL;
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return 0;
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@ -110,8 +105,7 @@ static int __init dmar_parse_one_dev_scope(struct acpi_dmar_device_scope *scope,
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pdev->subordinate) || (scope->entry_type == \
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ACPI_DMAR_SCOPE_TYPE_BRIDGE && !pdev->subordinate)) {
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pci_dev_put(pdev);
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printk(KERN_WARNING PREFIX
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"Device scope type does not match for %s\n",
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pr_warn("Device scope type does not match for %s\n",
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pci_name(pdev));
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return -EINVAL;
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}
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@ -134,8 +128,7 @@ int __init dmar_parse_dev_scope(void *start, void *end, int *cnt,
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scope->entry_type == ACPI_DMAR_SCOPE_TYPE_BRIDGE)
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(*cnt)++;
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else if (scope->entry_type != ACPI_DMAR_SCOPE_TYPE_IOAPIC) {
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printk(KERN_WARNING PREFIX
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"Unsupported device scope\n");
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pr_warn("Unsupported device scope\n");
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}
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start += scope->length;
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}
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@ -261,25 +254,23 @@ dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
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case ACPI_DMAR_TYPE_HARDWARE_UNIT:
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drhd = container_of(header, struct acpi_dmar_hardware_unit,
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header);
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printk (KERN_INFO PREFIX
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"DRHD base: %#016Lx flags: %#x\n",
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pr_info("DRHD base: %#016Lx flags: %#x\n",
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(unsigned long long)drhd->address, drhd->flags);
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break;
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case ACPI_DMAR_TYPE_RESERVED_MEMORY:
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rmrr = container_of(header, struct acpi_dmar_reserved_memory,
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header);
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printk (KERN_INFO PREFIX
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"RMRR base: %#016Lx end: %#016Lx\n",
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pr_info("RMRR base: %#016Lx end: %#016Lx\n",
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(unsigned long long)rmrr->base_address,
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(unsigned long long)rmrr->end_address);
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break;
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case ACPI_DMAR_TYPE_ATSR:
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atsr = container_of(header, struct acpi_dmar_atsr, header);
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printk(KERN_INFO PREFIX "ATSR flags: %#x\n", atsr->flags);
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pr_info("ATSR flags: %#x\n", atsr->flags);
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break;
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case ACPI_DMAR_HARDWARE_AFFINITY:
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rhsa = container_of(header, struct acpi_dmar_rhsa, header);
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printk(KERN_INFO PREFIX "RHSA base: %#016Lx proximity domain: %#x\n",
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pr_info("RHSA base: %#016Lx proximity domain: %#x\n",
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(unsigned long long)rhsa->base_address,
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rhsa->proximity_domain);
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break;
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@ -299,7 +290,7 @@ static int __init dmar_table_detect(void)
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&dmar_tbl_size);
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if (ACPI_SUCCESS(status) && !dmar_tbl) {
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printk (KERN_WARNING PREFIX "Unable to map DMAR\n");
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pr_warn("Unable to map DMAR\n");
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status = AE_NOT_FOUND;
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}
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@ -333,20 +324,18 @@ parse_dmar_table(void)
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return -ENODEV;
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if (dmar->width < PAGE_SHIFT - 1) {
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printk(KERN_WARNING PREFIX "Invalid DMAR haw\n");
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pr_warn("Invalid DMAR haw\n");
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return -EINVAL;
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}
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printk (KERN_INFO PREFIX "Host address width %d\n",
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dmar->width + 1);
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pr_info("Host address width %d\n", dmar->width + 1);
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entry_header = (struct acpi_dmar_header *)(dmar + 1);
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while (((unsigned long)entry_header) <
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(((unsigned long)dmar) + dmar_tbl->length)) {
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/* Avoid looping forever on bad ACPI tables */
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if (entry_header->length == 0) {
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printk(KERN_WARNING PREFIX
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"Invalid 0-length structure\n");
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pr_warn("Invalid 0-length structure\n");
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ret = -EINVAL;
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break;
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}
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@ -369,8 +358,7 @@ parse_dmar_table(void)
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#endif
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break;
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default:
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printk(KERN_WARNING PREFIX
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"Unknown DMAR structure type %d\n",
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pr_warn("Unknown DMAR structure type %d\n",
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entry_header->type);
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ret = 0; /* for forward compatibility */
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break;
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@ -469,12 +457,12 @@ int __init dmar_table_init(void)
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ret = parse_dmar_table();
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if (ret) {
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if (ret != -ENODEV)
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printk(KERN_INFO PREFIX "parse DMAR table failure.\n");
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pr_info("parse DMAR table failure.\n");
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return ret;
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}
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if (list_empty(&dmar_drhd_units)) {
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printk(KERN_INFO PREFIX "No DMAR devices found\n");
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pr_info("No DMAR devices found\n");
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return -ENODEV;
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}
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@ -506,8 +494,7 @@ int __init check_zero_address(void)
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(((unsigned long)dmar) + dmar_tbl->length)) {
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/* Avoid looping forever on bad ACPI tables */
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if (entry_header->length == 0) {
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printk(KERN_WARNING PREFIX
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"Invalid 0-length structure\n");
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pr_warn("Invalid 0-length structure\n");
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return 0;
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}
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@ -558,8 +545,7 @@ int __init detect_intel_iommu(void)
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if (ret && irq_remapping_enabled && cpu_has_x2apic &&
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dmar->flags & 0x1)
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printk(KERN_INFO
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"Queued invalidation will be enabled to support x2apic and Intr-remapping.\n");
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pr_info("Queued invalidation will be enabled to support x2apic and Intr-remapping.\n");
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if (ret && !no_iommu && !iommu_detected && !dmar_disabled) {
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iommu_detected = 1;
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@ -579,14 +565,89 @@ int __init detect_intel_iommu(void)
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}
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static void unmap_iommu(struct intel_iommu *iommu)
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{
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iounmap(iommu->reg);
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release_mem_region(iommu->reg_phys, iommu->reg_size);
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}
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/**
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* map_iommu: map the iommu's registers
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* @iommu: the iommu to map
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* @phys_addr: the physical address of the base resgister
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*
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* Memory map the iommu's registers. Start w/ a single page, and
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* possibly expand if that turns out to be insufficent.
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*/
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static int map_iommu(struct intel_iommu *iommu, u64 phys_addr)
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{
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int map_size, err=0;
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iommu->reg_phys = phys_addr;
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iommu->reg_size = VTD_PAGE_SIZE;
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if (!request_mem_region(iommu->reg_phys, iommu->reg_size, iommu->name)) {
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pr_err("IOMMU: can't reserve memory\n");
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err = -EBUSY;
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goto out;
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}
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iommu->reg = ioremap(iommu->reg_phys, iommu->reg_size);
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if (!iommu->reg) {
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pr_err("IOMMU: can't map the region\n");
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err = -ENOMEM;
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goto release;
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}
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iommu->cap = dmar_readq(iommu->reg + DMAR_CAP_REG);
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iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
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if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
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err = -EINVAL;
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warn_invalid_dmar(phys_addr, " returns all ones");
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goto unmap;
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}
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/* the registers might be more than one page */
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map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
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cap_max_fault_reg_offset(iommu->cap));
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map_size = VTD_PAGE_ALIGN(map_size);
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if (map_size > iommu->reg_size) {
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iounmap(iommu->reg);
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release_mem_region(iommu->reg_phys, iommu->reg_size);
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iommu->reg_size = map_size;
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if (!request_mem_region(iommu->reg_phys, iommu->reg_size,
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iommu->name)) {
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pr_err("IOMMU: can't reserve memory\n");
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err = -EBUSY;
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goto out;
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}
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iommu->reg = ioremap(iommu->reg_phys, iommu->reg_size);
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if (!iommu->reg) {
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pr_err("IOMMU: can't map the region\n");
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err = -ENOMEM;
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goto release;
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}
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}
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err = 0;
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goto out;
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unmap:
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iounmap(iommu->reg);
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release:
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release_mem_region(iommu->reg_phys, iommu->reg_size);
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out:
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return err;
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}
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int alloc_iommu(struct dmar_drhd_unit *drhd)
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{
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struct intel_iommu *iommu;
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int map_size;
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u32 ver;
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static int iommu_allocated = 0;
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int agaw = 0;
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int msagaw = 0;
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int err;
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if (!drhd->reg_base_addr) {
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warn_invalid_dmar(0, "");
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@ -600,30 +661,22 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
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iommu->seq_id = iommu_allocated++;
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sprintf (iommu->name, "dmar%d", iommu->seq_id);
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iommu->reg = ioremap(drhd->reg_base_addr, VTD_PAGE_SIZE);
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if (!iommu->reg) {
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printk(KERN_ERR "IOMMU: can't map the region\n");
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err = map_iommu(iommu, drhd->reg_base_addr);
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if (err) {
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pr_err("IOMMU: failed to map %s\n", iommu->name);
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goto error;
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}
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iommu->cap = dmar_readq(iommu->reg + DMAR_CAP_REG);
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iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
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if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
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warn_invalid_dmar(drhd->reg_base_addr, " returns all ones");
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goto err_unmap;
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}
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err = -EINVAL;
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agaw = iommu_calculate_agaw(iommu);
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if (agaw < 0) {
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printk(KERN_ERR
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"Cannot get a valid agaw for iommu (seq_id = %d)\n",
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pr_err("Cannot get a valid agaw for iommu (seq_id = %d)\n",
|
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iommu->seq_id);
|
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goto err_unmap;
|
||||
}
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msagaw = iommu_calculate_max_sagaw(iommu);
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||||
if (msagaw < 0) {
|
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printk(KERN_ERR
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"Cannot get a valid max agaw for iommu (seq_id = %d)\n",
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||||
pr_err("Cannot get a valid max agaw for iommu (seq_id = %d)\n",
|
||||
iommu->seq_id);
|
||||
goto err_unmap;
|
||||
}
|
||||
@ -632,19 +685,6 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
|
||||
|
||||
iommu->node = -1;
|
||||
|
||||
/* the registers might be more than one page */
|
||||
map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
|
||||
cap_max_fault_reg_offset(iommu->cap));
|
||||
map_size = VTD_PAGE_ALIGN(map_size);
|
||||
if (map_size > VTD_PAGE_SIZE) {
|
||||
iounmap(iommu->reg);
|
||||
iommu->reg = ioremap(drhd->reg_base_addr, map_size);
|
||||
if (!iommu->reg) {
|
||||
printk(KERN_ERR "IOMMU: can't map the region\n");
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
ver = readl(iommu->reg + DMAR_VER_REG);
|
||||
pr_info("IOMMU %d: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\n",
|
||||
iommu->seq_id,
|
||||
@ -659,10 +699,10 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
|
||||
return 0;
|
||||
|
||||
err_unmap:
|
||||
iounmap(iommu->reg);
|
||||
unmap_iommu(iommu);
|
||||
error:
|
||||
kfree(iommu);
|
||||
return -1;
|
||||
return err;
|
||||
}
|
||||
|
||||
void free_iommu(struct intel_iommu *iommu)
|
||||
@ -673,7 +713,8 @@ void free_iommu(struct intel_iommu *iommu)
|
||||
free_dmar_iommu(iommu);
|
||||
|
||||
if (iommu->reg)
|
||||
iounmap(iommu->reg);
|
||||
unmap_iommu(iommu);
|
||||
|
||||
kfree(iommu);
|
||||
}
|
||||
|
||||
@ -710,7 +751,7 @@ static int qi_check_fault(struct intel_iommu *iommu, int index)
|
||||
if (fault & DMA_FSTS_IQE) {
|
||||
head = readl(iommu->reg + DMAR_IQH_REG);
|
||||
if ((head >> DMAR_IQ_SHIFT) == index) {
|
||||
printk(KERN_ERR "VT-d detected invalid descriptor: "
|
||||
pr_err("VT-d detected invalid descriptor: "
|
||||
"low=%llx, high=%llx\n",
|
||||
(unsigned long long)qi->desc[index].low,
|
||||
(unsigned long long)qi->desc[index].high);
|
||||
@ -1129,15 +1170,14 @@ static int dmar_fault_do_one(struct intel_iommu *iommu, int type,
|
||||
reason = dmar_get_fault_reason(fault_reason, &fault_type);
|
||||
|
||||
if (fault_type == INTR_REMAP)
|
||||
printk(KERN_ERR "INTR-REMAP: Request device [[%02x:%02x.%d] "
|
||||
pr_err("INTR-REMAP: Request device [[%02x:%02x.%d] "
|
||||
"fault index %llx\n"
|
||||
"INTR-REMAP:[fault reason %02d] %s\n",
|
||||
(source_id >> 8), PCI_SLOT(source_id & 0xFF),
|
||||
PCI_FUNC(source_id & 0xFF), addr >> 48,
|
||||
fault_reason, reason);
|
||||
else
|
||||
printk(KERN_ERR
|
||||
"DMAR:[%s] Request device [%02x:%02x.%d] "
|
||||
pr_err("DMAR:[%s] Request device [%02x:%02x.%d] "
|
||||
"fault addr %llx \n"
|
||||
"DMAR:[fault reason %02d] %s\n",
|
||||
(type ? "DMA Read" : "DMA Write"),
|
||||
@ -1157,8 +1197,7 @@ irqreturn_t dmar_fault(int irq, void *dev_id)
|
||||
raw_spin_lock_irqsave(&iommu->register_lock, flag);
|
||||
fault_status = readl(iommu->reg + DMAR_FSTS_REG);
|
||||
if (fault_status)
|
||||
printk(KERN_ERR "DRHD: handling fault status reg %x\n",
|
||||
fault_status);
|
||||
pr_err("DRHD: handling fault status reg %x\n", fault_status);
|
||||
|
||||
/* TBD: ignore advanced fault log currently */
|
||||
if (!(fault_status & DMA_FSTS_PPF))
|
||||
@ -1224,7 +1263,7 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
|
||||
|
||||
irq = create_irq();
|
||||
if (!irq) {
|
||||
printk(KERN_ERR "IOMMU: no free vectors\n");
|
||||
pr_err("IOMMU: no free vectors\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -1241,7 +1280,7 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
|
||||
|
||||
ret = request_irq(irq, dmar_fault, IRQF_NO_THREAD, iommu->name, iommu);
|
||||
if (ret)
|
||||
printk(KERN_ERR "IOMMU: can't request irq\n");
|
||||
pr_err("IOMMU: can't request irq\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1258,8 +1297,7 @@ int __init enable_drhd_fault_handling(void)
|
||||
ret = dmar_set_interrupt(iommu);
|
||||
|
||||
if (ret) {
|
||||
printk(KERN_ERR "DRHD %Lx: failed to enable fault, "
|
||||
" interrupt, ret %d\n",
|
||||
pr_err("DRHD %Lx: failed to enable fault, interrupt, ret %d\n",
|
||||
(unsigned long long)drhd->reg_base_addr, ret);
|
||||
return -1;
|
||||
}
|
||||
|
@ -308,6 +308,8 @@ enum {
|
||||
|
||||
struct intel_iommu {
|
||||
void __iomem *reg; /* Pointer to hardware regs, virtual addr */
|
||||
u64 reg_phys; /* physical address of hw register set */
|
||||
u64 reg_size; /* size of hw register set */
|
||||
u64 cap;
|
||||
u64 ecap;
|
||||
u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */
|
||||
|
Loading…
Reference in New Issue
Block a user