gpio: zevio: drop of_gpio.h header
Remove of_gpio.h header file, replace of_* functions and structs with appropriate alternatives. Signed-off-by: Moses Christopher Bollavarapu <mosescb.dev@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
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@ -11,7 +11,6 @@
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#include <linux/bitops.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/of_device.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio/driver.h>
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@ -53,22 +52,23 @@
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#define ZEVIO_GPIO_BIT(gpio) (gpio&7)
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#define ZEVIO_GPIO_BIT(gpio) (gpio&7)
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struct zevio_gpio {
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struct zevio_gpio {
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struct gpio_chip chip;
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spinlock_t lock;
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spinlock_t lock;
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struct of_mm_gpio_chip chip;
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void __iomem *regs;
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};
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};
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static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin,
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static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin,
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unsigned port_offset)
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unsigned port_offset)
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{
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{
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unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
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unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
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return readl(IOMEM(c->chip.regs + section_offset + port_offset));
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return readl(IOMEM(c->regs + section_offset + port_offset));
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}
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}
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static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin,
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static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin,
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unsigned port_offset, u32 val)
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unsigned port_offset, u32 val)
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{
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{
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unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
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unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
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writel(val, IOMEM(c->chip.regs + section_offset + port_offset));
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writel(val, IOMEM(c->regs + section_offset + port_offset));
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}
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}
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/* Functions for struct gpio_chip */
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/* Functions for struct gpio_chip */
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@ -178,12 +178,15 @@ static int zevio_gpio_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, controller);
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platform_set_drvdata(pdev, controller);
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/* Copy our reference */
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/* Copy our reference */
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controller->chip.gc = zevio_gpio_chip;
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controller->chip = zevio_gpio_chip;
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controller->chip.gc.parent = &pdev->dev;
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controller->chip.parent = &pdev->dev;
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status = of_mm_gpiochip_add_data(pdev->dev.of_node,
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controller->regs = devm_platform_ioremap_resource(pdev, 0);
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&(controller->chip),
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if (IS_ERR(controller->regs))
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controller);
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return dev_err_probe(&pdev->dev, PTR_ERR(controller->regs),
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"failed to ioremap memory resource\n");
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status = devm_gpiochip_add_data(&pdev->dev, &controller->chip, controller);
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if (status) {
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if (status) {
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dev_err(&pdev->dev, "failed to add gpiochip: %d\n", status);
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dev_err(&pdev->dev, "failed to add gpiochip: %d\n", status);
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return status;
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return status;
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@ -192,10 +195,10 @@ static int zevio_gpio_probe(struct platform_device *pdev)
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spin_lock_init(&controller->lock);
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spin_lock_init(&controller->lock);
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/* Disable interrupts, they only cause errors */
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/* Disable interrupts, they only cause errors */
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for (i = 0; i < controller->chip.gc.ngpio; i += 8)
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for (i = 0; i < controller->chip.ngpio; i += 8)
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zevio_gpio_port_set(controller, i, ZEVIO_GPIO_INT_MASK, 0xFF);
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zevio_gpio_port_set(controller, i, ZEVIO_GPIO_INT_MASK, 0xFF);
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dev_dbg(controller->chip.gc.parent, "ZEVIO GPIO controller set up!\n");
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dev_dbg(controller->chip.parent, "ZEVIO GPIO controller set up!\n");
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return 0;
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return 0;
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}
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}
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