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phy: lpc18xx-usb-otg: fix clock order in phy init

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Changing the frequency of the USB clock must be done before the
PLL is powered on (prepared). This matters when the USB clock
is not setup by either boot ROM or boot loader. Reorder the
function calls to adhere to the order noted in the user manual.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Joachim Eastwood 2015-08-09 00:02:41 +02:00 committed by Kishon Vijay Abraham I
parent 4a9e5ca1a5
commit cfd093bbb5
1 changed files with 3 additions and 3 deletions
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6
drivers/phy/phy-lpc18xx-usb-otg.c
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@ -33,12 +33,12 @@ static int lpc18xx_usb_otg_phy_init(struct phy *phy)
struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);
int ret;
ret = clk_prepare(lpc->clk);
/* The PHY must be clocked at 480 MHz */
ret = clk_set_rate(lpc->clk, 480000000);
if (ret)
return ret;
/* The PHY must be clocked at 480 MHz */
return clk_set_rate(lpc->clk, 480000000);
return clk_prepare(lpc->clk);
}
static int lpc18xx_usb_otg_phy_exit(struct phy *phy)