staging:iio:lis3l02dq cleanups
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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c40ab87494
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d0348e5056
@ -150,7 +150,7 @@ Form of high byte dependant on justification set in ctrl reg */
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* struct lis3l02dq_state - device instance specific data
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* @us: actual spi_device
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* @work_trigger_to_ring: bh for triggered event handling
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* @work_cont_thresh: CLEAN
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* @work_thresh: bh for threshold events
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* @inter: used to check if new interrupt has been triggered
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* @last_timestamp: passing timestamp from th to bh of interrupt handler
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* @indio_dev: industrial I/O device structure
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@ -162,7 +162,7 @@ Form of high byte dependant on justification set in ctrl reg */
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struct lis3l02dq_state {
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struct spi_device *us;
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struct work_struct work_trigger_to_ring;
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struct iio_work_cont work_cont_thresh;
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struct work_struct work_thresh;
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bool inter;
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s64 last_timestamp;
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struct iio_dev *indio_dev;
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@ -96,7 +96,7 @@ int lis3l02dq_spi_write_reg_8(struct device *dev,
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync(st->us, &msg);
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mutex_unlock(&st->buf_lock);
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return ret;
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@ -524,8 +524,7 @@ static ssize_t lis3l02dq_read_interrupt_config(struct device *dev,
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LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
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(u8 *)&val);
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return ret ? ret : sprintf(buf, "%d\n",
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(val & this_attr->mask) ? 1 : 0);;
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return ret ? ret : sprintf(buf, "%d\n", !!(val & this_attr->mask));
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}
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static ssize_t lis3l02dq_write_interrupt_config(struct device *dev,
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@ -604,7 +603,7 @@ static int lis3l02dq_thresh_handler_th(struct iio_dev *dev_info,
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/* Stash the timestamp somewhere convenient for the bh */
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st->last_timestamp = timestamp;
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schedule_work(&st->work_cont_thresh.ws);
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schedule_work(&st->work_thresh);
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return 0;
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}
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@ -615,9 +614,10 @@ static int lis3l02dq_thresh_handler_th(struct iio_dev *dev_info,
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*/
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static void lis3l02dq_thresh_handler_bh_no_check(struct work_struct *work_s)
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{
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struct iio_work_cont *wc
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= container_of(work_s, struct iio_work_cont, ws);
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struct lis3l02dq_state *st = wc->st;
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struct lis3l02dq_state *st
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= container_of(work_s,
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struct lis3l02dq_state, work_thresh);
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u8 t;
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lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
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@ -750,6 +750,7 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
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ret = -ENOMEM;
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goto error_ret;
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}
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INIT_WORK(&st->work_thresh, lis3l02dq_thresh_handler_bh_no_check);
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/* this is only used tor removal purposes */
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spi_set_drvdata(spi, st);
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@ -797,16 +798,6 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
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}
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if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
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/* This is a little unusual, in that the device seems
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to need a full read of the interrupt source reg before
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the interrupt will reset.
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Hence the two handlers are the same */
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iio_init_work_cont(&st->work_cont_thresh,
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lis3l02dq_thresh_handler_bh_no_check,
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lis3l02dq_thresh_handler_bh_no_check,
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LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
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0,
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st);
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st->inter = 0;
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ret = iio_register_interrupt_line(spi->irq,
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st->indio_dev,
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@ -591,12 +591,4 @@ void lis3l02dq_uninitialize_ring(struct iio_ring_buffer *ring)
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iio_ring_buffer_unregister(ring);
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}
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int lis3l02dq_set_ring_length(struct iio_dev *indio_dev, int length)
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{
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/* Set sensible defaults for the ring buffer */
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if (indio_dev->ring->access.set_length)
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return indio_dev->ring->access.set_length(indio_dev->ring, 500);
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return 0;
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}
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