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scsi: qla2xxx: edif: Fix EDIF enable flag

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edif_enabled is prematurely turned on if hardware is capable of handling
the feature.  However, firmware also needs to support EDIF before enabling
this bit.

Link: https://lore.kernel.org/r/20210817051315.2477-4-njavali@marvell.com
Signed-off-by: Quinn Tran <qutran@marvell.com>
Signed-off-by: Nilesh Javali <njavali@marvell.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Quinn Tran 2021-08-16 22:13:06 -07:00 committed by Martin K. Petersen
parent 225479296c
commit d07b75ba96
2 changed files with 13 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/scsi/qla2xxx/qla_def.h
View File

@ -4021,6 +4021,7 @@ struct qla_hw_data {
uint32_t scm_supported_f:1;
/* Enabled in Driver */
uint32_t scm_enabled:1;
uint32_t edif_hw:1;
uint32_t edif_enabled:1;
uint32_t plogi_template_valid:1;
uint32_t port_isolated:1;
@ -4433,6 +4434,7 @@ struct qla_hw_data {
/* Cisco fabric attached */
#define FW_ATTR_EXT0_SCM_CISCO 0x00002000
#define FW_ATTR_EXT0_NVME2 BIT_13
#define FW_ATTR_EXT0_EDIF BIT_5
uint16_t fw_attributes_ext[2];
uint32_t fw_memory_size;
uint32_t fw_transfer_size;

14
drivers/scsi/qla2xxx/qla_mbx.c
View File

@ -663,6 +663,7 @@ qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
}
#define NVME_ENABLE_FLAG BIT_3
#define EDIF_HW_SUPPORT BIT_10
/*
* qla2x00_execute_fw
@ -795,10 +796,10 @@ again:
}
}
if (IS_QLA28XX(ha) && (mcp->mb[5] & BIT_10) && ql2xsecenable) {
ha->flags.edif_enabled = 1;
if (IS_QLA28XX(ha) && (mcp->mb[5] & EDIF_HW_SUPPORT)) {
ha->flags.edif_hw = 1;
ql_log(ql_log_info, vha, 0xffff,
"%s: edif is enabled\n", __func__);
"%s: edif HW\n", __func__);
}
done:
@ -1136,6 +1137,13 @@ qla2x00_get_fw_version(scsi_qla_host_t *vha)
ha->fw_attributes_ext[0]);
vha->flags.nvme2_enabled = 1;
}
if (IS_QLA28XX(ha) && ha->flags.edif_hw && ql2xsecenable &&
(ha->fw_attributes_ext[0] & FW_ATTR_EXT0_EDIF)) {
ha->flags.edif_enabled = 1;
ql_log(ql_log_info + ql_dbg_edif, vha, 0xffff,
"%s: edif is enabled\n", __func__);
}
}
if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {