net: lan966x: Add support for ptp clocks
The lan966x has 3 PHC. Enable each of them, for now all the timestamping is happening on the first PHC. Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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d700dff41d
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d096459494
@ -7,4 +7,5 @@ obj-$(CONFIG_LAN966X_SWITCH) += lan966x-switch.o
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lan966x-switch-objs := lan966x_main.o lan966x_phylink.o lan966x_port.o \
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lan966x_mac.o lan966x_ethtool.o lan966x_switchdev.o \
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lan966x_vlan.o lan966x_fdb.o lan966x_mdb.o
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lan966x_vlan.o lan966x_fdb.o lan966x_mdb.o \
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lan966x_ptp.o
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@ -932,8 +932,15 @@ static int lan966x_probe(struct platform_device *pdev)
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if (err)
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goto cleanup_ports;
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err = lan966x_ptp_init(lan966x);
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if (err)
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goto cleanup_fdb;
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return 0;
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cleanup_fdb:
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lan966x_fdb_deinit(lan966x);
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cleanup_ports:
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fwnode_handle_put(portnp);
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@ -959,6 +966,7 @@ static int lan966x_remove(struct platform_device *pdev)
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lan966x_mac_purge_entries(lan966x);
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lan966x_mdb_deinit(lan966x);
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lan966x_fdb_deinit(lan966x);
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lan966x_ptp_deinit(lan966x);
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return 0;
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}
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@ -8,6 +8,7 @@
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#include <linux/jiffies.h>
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#include <linux/phy.h>
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#include <linux/phylink.h>
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#include <linux/ptp_clock_kernel.h>
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#include <net/switchdev.h>
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#include "lan966x_regs.h"
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@ -50,6 +51,9 @@
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#define LAN966X_SPEED_100 2
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#define LAN966X_SPEED_10 3
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#define LAN966X_PHC_COUNT 3
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#define LAN966X_PHC_PORT 0
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/* MAC table entry types.
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* ENTRYTYPE_NORMAL is subject to aging.
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* ENTRYTYPE_LOCKED is not subject to aging.
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@ -70,6 +74,14 @@ struct lan966x_stat_layout {
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char name[ETH_GSTRING_LEN];
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};
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struct lan966x_phc {
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struct ptp_clock *clock;
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struct ptp_clock_info info;
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struct hwtstamp_config hwtstamp_config;
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struct lan966x *lan966x;
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u8 index;
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};
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struct lan966x {
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struct device *dev;
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@ -113,6 +125,11 @@ struct lan966x {
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/* mdb */
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struct list_head mdb_entries;
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struct list_head pgid_entries;
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/* ptp */
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bool ptp;
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struct lan966x_phc phc[LAN966X_PHC_COUNT];
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spinlock_t ptp_clock_lock; /* lock for phc */
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};
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struct lan966x_port_config {
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@ -228,6 +245,9 @@ int lan966x_handle_port_mdb_del(struct lan966x_port *port,
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void lan966x_mdb_erase_entries(struct lan966x *lan966x, u16 vid);
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void lan966x_mdb_write_entries(struct lan966x *lan966x, u16 vid);
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int lan966x_ptp_init(struct lan966x *lan966x);
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void lan966x_ptp_deinit(struct lan966x *lan966x);
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static inline void __iomem *lan_addr(void __iomem *base[],
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int id, int tinst, int tcnt,
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int gbase, int ginst,
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287
drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c
Normal file
287
drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c
Normal file
@ -0,0 +1,287 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include <linux/ptp_classify.h>
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#include "lan966x_main.h"
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#define LAN966X_MAX_PTP_ID 512
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/* Represents 1ppm adjustment in 2^59 format with 6.037735849ns as reference
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* The value is calculated as following: (1/1000000)/((2^-59)/6.037735849)
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*/
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#define LAN966X_1PPM_FORMAT 3480517749723LL
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/* Represents 1ppb adjustment in 2^29 format with 6.037735849ns as reference
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* The value is calculated as following: (1/1000000000)/((2^59)/6.037735849)
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*/
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#define LAN966X_1PPB_FORMAT 3480517749LL
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#define TOD_ACC_PIN 0x5
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enum {
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PTP_PIN_ACTION_IDLE = 0,
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PTP_PIN_ACTION_LOAD,
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PTP_PIN_ACTION_SAVE,
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PTP_PIN_ACTION_CLOCK,
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PTP_PIN_ACTION_DELTA,
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PTP_PIN_ACTION_TOD
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};
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static u64 lan966x_ptp_get_nominal_value(void)
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{
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u64 res = 0x304d2df1;
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res <<= 32;
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return res;
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}
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static int lan966x_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
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struct lan966x *lan966x = phc->lan966x;
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unsigned long flags;
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bool neg_adj = 0;
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u64 tod_inc;
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u64 ref;
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if (!scaled_ppm)
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return 0;
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if (scaled_ppm < 0) {
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neg_adj = 1;
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scaled_ppm = -scaled_ppm;
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}
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tod_inc = lan966x_ptp_get_nominal_value();
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/* The multiplication is split in 2 separate additions because of
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* overflow issues. If scaled_ppm with 16bit fractional part was bigger
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* than 20ppm then we got overflow.
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*/
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ref = LAN966X_1PPM_FORMAT * (scaled_ppm >> 16);
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ref += (LAN966X_1PPM_FORMAT * (0xffff & scaled_ppm)) >> 16;
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tod_inc = neg_adj ? tod_inc - ref : tod_inc + ref;
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spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
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lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(1 << BIT(phc->index)),
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PTP_DOM_CFG_CLKCFG_DIS,
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lan966x, PTP_DOM_CFG);
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lan_wr((u32)tod_inc & 0xFFFFFFFF, lan966x,
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PTP_CLK_PER_CFG(phc->index, 0));
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lan_wr((u32)(tod_inc >> 32), lan966x,
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PTP_CLK_PER_CFG(phc->index, 1));
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lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0),
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PTP_DOM_CFG_CLKCFG_DIS,
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lan966x, PTP_DOM_CFG);
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spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
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return 0;
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}
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static int lan966x_ptp_settime64(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
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struct lan966x *lan966x = phc->lan966x;
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unsigned long flags;
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spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
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/* Must be in IDLE mode before the time can be loaded */
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lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
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PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
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PTP_PIN_CFG_PIN_SYNC_SET(0),
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PTP_PIN_CFG_PIN_ACTION |
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PTP_PIN_CFG_PIN_DOM |
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PTP_PIN_CFG_PIN_SYNC,
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lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
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/* Set new value */
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lan_wr(PTP_TOD_SEC_MSB_TOD_SEC_MSB_SET(upper_32_bits(ts->tv_sec)),
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lan966x, PTP_TOD_SEC_MSB(TOD_ACC_PIN));
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lan_wr(lower_32_bits(ts->tv_sec),
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lan966x, PTP_TOD_SEC_LSB(TOD_ACC_PIN));
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lan_wr(ts->tv_nsec, lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
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/* Apply new values */
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lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_LOAD) |
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PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
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PTP_PIN_CFG_PIN_SYNC_SET(0),
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PTP_PIN_CFG_PIN_ACTION |
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PTP_PIN_CFG_PIN_DOM |
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PTP_PIN_CFG_PIN_SYNC,
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lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
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spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
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return 0;
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}
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static int lan966x_ptp_gettime64(struct ptp_clock_info *ptp,
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struct timespec64 *ts)
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{
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struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
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struct lan966x *lan966x = phc->lan966x;
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unsigned long flags;
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time64_t s;
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s64 ns;
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spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
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lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
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PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
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PTP_PIN_CFG_PIN_SYNC_SET(0),
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PTP_PIN_CFG_PIN_ACTION |
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PTP_PIN_CFG_PIN_DOM |
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PTP_PIN_CFG_PIN_SYNC,
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lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
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s = lan_rd(lan966x, PTP_TOD_SEC_MSB(TOD_ACC_PIN));
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s <<= 32;
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s |= lan_rd(lan966x, PTP_TOD_SEC_LSB(TOD_ACC_PIN));
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ns = lan_rd(lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
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ns &= PTP_TOD_NSEC_TOD_NSEC;
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spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
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/* Deal with negative values */
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if ((ns & 0xFFFFFFF0) == 0x3FFFFFF0) {
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s--;
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ns &= 0xf;
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ns += 999999984;
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}
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set_normalized_timespec64(ts, s, ns);
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return 0;
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}
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static int lan966x_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
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struct lan966x *lan966x = phc->lan966x;
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if (delta > -(NSEC_PER_SEC / 2) && delta < (NSEC_PER_SEC / 2)) {
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unsigned long flags;
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spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
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/* Must be in IDLE mode before the time can be loaded */
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lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
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PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
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PTP_PIN_CFG_PIN_SYNC_SET(0),
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PTP_PIN_CFG_PIN_ACTION |
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PTP_PIN_CFG_PIN_DOM |
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PTP_PIN_CFG_PIN_SYNC,
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lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
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lan_wr(PTP_TOD_NSEC_TOD_NSEC_SET(delta),
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lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
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/* Adjust time with the value of PTP_TOD_NSEC */
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lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_DELTA) |
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PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
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PTP_PIN_CFG_PIN_SYNC_SET(0),
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PTP_PIN_CFG_PIN_ACTION |
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PTP_PIN_CFG_PIN_DOM |
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PTP_PIN_CFG_PIN_SYNC,
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lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
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spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
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} else {
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/* Fall back using lan966x_ptp_settime64 which is not exact */
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struct timespec64 ts;
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u64 now;
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lan966x_ptp_gettime64(ptp, &ts);
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now = ktime_to_ns(timespec64_to_ktime(ts));
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ts = ns_to_timespec64(now + delta);
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lan966x_ptp_settime64(ptp, &ts);
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}
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return 0;
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}
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static struct ptp_clock_info lan966x_ptp_clock_info = {
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.owner = THIS_MODULE,
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.name = "lan966x ptp",
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.max_adj = 200000,
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.gettime64 = lan966x_ptp_gettime64,
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.settime64 = lan966x_ptp_settime64,
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.adjtime = lan966x_ptp_adjtime,
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.adjfine = lan966x_ptp_adjfine,
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};
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static int lan966x_ptp_phc_init(struct lan966x *lan966x,
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int index,
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struct ptp_clock_info *clock_info)
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{
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struct lan966x_phc *phc = &lan966x->phc[index];
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phc->info = *clock_info;
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phc->clock = ptp_clock_register(&phc->info, lan966x->dev);
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if (IS_ERR(phc->clock))
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return PTR_ERR(phc->clock);
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phc->index = index;
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phc->lan966x = lan966x;
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/* PTP Rx stamping is always enabled. */
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phc->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
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return 0;
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}
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int lan966x_ptp_init(struct lan966x *lan966x)
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{
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u64 tod_adj = lan966x_ptp_get_nominal_value();
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int err, i;
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if (!lan966x->ptp)
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return 0;
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for (i = 0; i < LAN966X_PHC_COUNT; ++i) {
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err = lan966x_ptp_phc_init(lan966x, i, &lan966x_ptp_clock_info);
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if (err)
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return err;
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}
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spin_lock_init(&lan966x->ptp_clock_lock);
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/* Disable master counters */
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lan_wr(PTP_DOM_CFG_ENA_SET(0), lan966x, PTP_DOM_CFG);
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/* Configure the nominal TOD increment per clock cycle */
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lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0x7),
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PTP_DOM_CFG_CLKCFG_DIS,
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lan966x, PTP_DOM_CFG);
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for (i = 0; i < LAN966X_PHC_COUNT; ++i) {
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lan_wr((u32)tod_adj & 0xFFFFFFFF, lan966x,
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PTP_CLK_PER_CFG(i, 0));
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lan_wr((u32)(tod_adj >> 32), lan966x,
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PTP_CLK_PER_CFG(i, 1));
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}
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lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0),
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PTP_DOM_CFG_CLKCFG_DIS,
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lan966x, PTP_DOM_CFG);
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/* Enable master counters */
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lan_wr(PTP_DOM_CFG_ENA_SET(0x7), lan966x, PTP_DOM_CFG);
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return 0;
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}
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void lan966x_ptp_deinit(struct lan966x *lan966x)
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{
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int i;
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for (i = 0; i < LAN966X_PHC_COUNT; ++i)
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ptp_clock_unregister(lan966x->phc[i].clock);
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}
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