PCI: imx6: Factor out ref clock disable to match enable
The PCIe ref clocks are specific to different variants. The enables are already split out into imx6_pcie_enable_ref_clk(), but the disables were combined with the more generic bus/phy/pcie clock disables in imx6_pcie_clk_disable(). Split out the variant-specific disables into imx6_pcie_disable_ref_clk() to match imx6_pcie_enable_ref_clk(). No functional change intended. Link: https://lore.kernel.org/r/1657783869-19194-6-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
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@ -580,12 +580,8 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
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return ret;
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}
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static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
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{
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clk_disable_unprepare(imx6_pcie->pcie);
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clk_disable_unprepare(imx6_pcie->pcie_phy);
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clk_disable_unprepare(imx6_pcie->pcie_bus);
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switch (imx6_pcie->drvdata->variant) {
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case IMX6SX:
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clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
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@ -595,8 +591,8 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
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IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
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break;
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case IMX8MQ:
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case IMX8MM:
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case IMX8MQ:
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clk_disable_unprepare(imx6_pcie->pcie_aux);
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break;
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default:
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@ -604,6 +600,14 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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}
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}
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static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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{
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clk_disable_unprepare(imx6_pcie->pcie);
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clk_disable_unprepare(imx6_pcie->pcie_phy);
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clk_disable_unprepare(imx6_pcie->pcie_bus);
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imx6_pcie_disable_ref_clk(imx6_pcie);
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}
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static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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{
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struct device *dev = imx6_pcie->pci->dev;
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