intel_idle: add initial Sandy Bridge support
Signed-off-by: Len Brown <len.brown@intel.com>
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815c4163b6
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d13780d439
@ -83,7 +83,7 @@ static unsigned int substates;
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static int (*choose_substate)(int);
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/* Reliable LAPIC Timer States, bit 1 for C1 etc. */
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static unsigned int lapic_timer_reliable_states;
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static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */
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static struct cpuidle_device *intel_idle_cpuidle_devices;
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static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
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@ -126,6 +126,42 @@ static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = {
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.enter = &intel_idle },
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};
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static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = {
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{ /* MWAIT C0 */ },
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{ /* MWAIT C1 */
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.name = "SNB-C1",
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.desc = "MWAIT 0x00",
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.driver_data = (void *) 0x00,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.exit_latency = 1,
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.target_residency = 4,
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.enter = &intel_idle },
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{ /* MWAIT C2 */
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.name = "SNB-C3",
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.desc = "MWAIT 0x10",
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.driver_data = (void *) 0x10,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.exit_latency = 80,
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.target_residency = 160,
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.enter = &intel_idle },
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{ /* MWAIT C3 */
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.name = "SNB-C6",
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.desc = "MWAIT 0x20",
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.driver_data = (void *) 0x20,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.exit_latency = 104,
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.target_residency = 208,
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.enter = &intel_idle },
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{ /* MWAIT C4 */
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.name = "SNB-C7",
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.desc = "MWAIT 0x30",
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.driver_data = (void *) 0x30,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.exit_latency = 109,
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.target_residency = 300,
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.enter = &intel_idle },
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};
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static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = {
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{ /* MWAIT C0 */ },
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{ /* MWAIT C1 */
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@ -312,6 +348,12 @@ static int intel_idle_probe(void)
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cpuidle_state_table = atom_cstates;
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choose_substate = choose_zero_substate;
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break;
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case 0x2A: /* SNB */
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case 0x2D: /* SNB Xeon */
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cpuidle_state_table = snb_cstates;
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choose_substate = choose_zero_substate;
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break;
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#ifdef FUTURE_USE
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case 0x17: /* 23 - Core 2 Duo */
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lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */
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