drm/i915: Split pipe+output CSC programming to noarm+arm pair
Move most of the pipe+output CSC programming to the .color_commit_noarm() hook which runs before vblank evasion. Only PIPE_CSC_MODE (the arming register) needs to remain in inside the critical section. A test case that just updates the CTM in a loop produces the following i915_update_info numbers on ilk (w/o lockdep): old new Updates: 10012 Updates: 10008 | | 1us |** 1us |********** |************* |************* 4us |********* 4us |* |* |** 16us | 16us | | | 66us | 66us | | | 262us | 262us | | | 1ms | 1ms | | | 4ms | 4ms | | | 17ms | 17ms | | | Min update: 1345ns Min update: 1268ns Max update: 16672ns Max update: 15656ns Average update: 3914ns Average update: 2185ns Overruns > 100us: 0 Overruns > 100us: 0 And here is tgl (forced to update both pipe CSC and output CSC, and with lockdep enabled): old new Updates: 10012 Updates: 10012 | | 1us | 1us | | | 4us |* 4us |** |** |********** 16us |************* 16us |************* |* | 66us | 66us | | | 262us | 262us | | | 1ms | 1ms | | | 4ms | 4ms | | | 17ms | 17ms | | | Min update: 5204ns Min update: 5176ns Max update: 176038ns Max update: 186685ns Average update: 23931ns Average update: 16654ns Overruns > 250us: 0 Overruns > 250us: 0 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220224165103.15682-5-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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@ -346,15 +346,11 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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ilk_csc_coeff_identity,
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ilk_csc_off_zero);
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}
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intel_de_write_fw(dev_priv, PIPE_CSC_MODE(crtc->pipe),
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crtc_state->csc_mode);
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}
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static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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if (crtc_state->hw.ctm) {
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u16 coeff[9];
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@ -373,9 +369,6 @@ static void icl_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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ilk_csc_coeff_limited_range,
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ilk_csc_postoff_limited_range);
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}
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intel_de_write_fw(dev_priv, PIPE_CSC_MODE(crtc->pipe),
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crtc_state->csc_mode);
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}
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static void chv_load_cgm_csc(struct intel_crtc *crtc,
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@ -500,6 +493,16 @@ static void icl_lut_multi_seg_pack(struct drm_color_lut *entry, u32 ldw, u32 udw
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REG_FIELD_GET(PAL_PREC_MULTI_SEG_BLUE_LDW_MASK, ldw);
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}
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static void icl_color_commit_noarm(const struct intel_crtc_state *crtc_state)
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{
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icl_load_csc_matrix(crtc_state);
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}
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static void ilk_color_commit_noarm(const struct intel_crtc_state *crtc_state)
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{
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ilk_load_csc_matrix(crtc_state);
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}
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static void i9xx_color_commit_arm(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
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@ -525,7 +528,8 @@ static void ilk_color_commit_arm(const struct intel_crtc_state *crtc_state)
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val |= PIPECONF_GAMMA_MODE(crtc_state->gamma_mode);
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intel_de_write(dev_priv, PIPECONF(pipe), val);
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ilk_load_csc_matrix(crtc_state);
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intel_de_write_fw(dev_priv, PIPE_CSC_MODE(pipe),
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crtc_state->csc_mode);
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}
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static void hsw_color_commit_arm(const struct intel_crtc_state *crtc_state)
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@ -536,7 +540,8 @@ static void hsw_color_commit_arm(const struct intel_crtc_state *crtc_state)
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intel_de_write(dev_priv, GAMMA_MODE(crtc->pipe),
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crtc_state->gamma_mode);
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ilk_load_csc_matrix(crtc_state);
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intel_de_write_fw(dev_priv, PIPE_CSC_MODE(crtc->pipe),
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crtc_state->csc_mode);
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}
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static void skl_color_commit_arm(const struct intel_crtc_state *crtc_state)
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@ -560,10 +565,8 @@ static void skl_color_commit_arm(const struct intel_crtc_state *crtc_state)
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intel_de_write(dev_priv, GAMMA_MODE(crtc->pipe),
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crtc_state->gamma_mode);
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if (DISPLAY_VER(dev_priv) >= 11)
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icl_load_csc_matrix(crtc_state);
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else
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ilk_load_csc_matrix(crtc_state);
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intel_de_write_fw(dev_priv, PIPE_CSC_MODE(crtc->pipe),
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crtc_state->csc_mode);
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}
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static void i9xx_load_lut_8(struct intel_crtc *crtc,
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@ -2170,6 +2173,7 @@ static const struct intel_color_funcs i9xx_color_funcs = {
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static const struct intel_color_funcs icl_color_funcs = {
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.color_check = icl_color_check,
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.color_commit_noarm = icl_color_commit_noarm,
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.color_commit_arm = skl_color_commit_arm,
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.load_luts = icl_load_luts,
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.read_luts = icl_read_luts,
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@ -2177,6 +2181,7 @@ static const struct intel_color_funcs icl_color_funcs = {
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static const struct intel_color_funcs glk_color_funcs = {
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.color_check = glk_color_check,
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.color_commit_noarm = ilk_color_commit_noarm,
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.color_commit_arm = skl_color_commit_arm,
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.load_luts = glk_load_luts,
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.read_luts = glk_read_luts,
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@ -2184,6 +2189,7 @@ static const struct intel_color_funcs glk_color_funcs = {
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static const struct intel_color_funcs skl_color_funcs = {
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.color_check = ivb_color_check,
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.color_commit_noarm = ilk_color_commit_noarm,
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.color_commit_arm = skl_color_commit_arm,
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.load_luts = bdw_load_luts,
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.read_luts = NULL,
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@ -2191,6 +2197,7 @@ static const struct intel_color_funcs skl_color_funcs = {
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static const struct intel_color_funcs bdw_color_funcs = {
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.color_check = ivb_color_check,
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.color_commit_noarm = ilk_color_commit_noarm,
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.color_commit_arm = hsw_color_commit_arm,
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.load_luts = bdw_load_luts,
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.read_luts = NULL,
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@ -2198,6 +2205,7 @@ static const struct intel_color_funcs bdw_color_funcs = {
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static const struct intel_color_funcs hsw_color_funcs = {
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.color_check = ivb_color_check,
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.color_commit_noarm = ilk_color_commit_noarm,
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.color_commit_arm = hsw_color_commit_arm,
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.load_luts = ivb_load_luts,
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.read_luts = NULL,
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@ -2205,6 +2213,7 @@ static const struct intel_color_funcs hsw_color_funcs = {
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static const struct intel_color_funcs ivb_color_funcs = {
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.color_check = ivb_color_check,
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.color_commit_noarm = ilk_color_commit_noarm,
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.color_commit_arm = ilk_color_commit_arm,
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.load_luts = ivb_load_luts,
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.read_luts = NULL,
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@ -2212,6 +2221,7 @@ static const struct intel_color_funcs ivb_color_funcs = {
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static const struct intel_color_funcs ilk_color_funcs = {
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.color_check = ilk_color_check,
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.color_commit_noarm = ilk_color_commit_noarm,
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.color_commit_arm = ilk_color_commit_arm,
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.load_luts = ilk_load_luts,
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.read_luts = ilk_read_luts,
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