ARM: common: edma: Remove unused functions
We no longer have users for these functions so they can be removed. Remove also unused enums from the header file. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
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696d8b70c0
commit
d28c2b36d6
@ -510,62 +510,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
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return IRQ_HANDLED;
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}
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static int reserve_contiguous_slots(int ctlr, unsigned int id,
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unsigned int num_slots,
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unsigned int start_slot)
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{
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int i, j;
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unsigned int count = num_slots;
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int stop_slot = start_slot;
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DECLARE_BITMAP(tmp_inuse, EDMA_MAX_PARAMENTRY);
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for (i = start_slot; i < edma_cc[ctlr]->num_slots; ++i) {
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j = EDMA_CHAN_SLOT(i);
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if (!test_and_set_bit(j, edma_cc[ctlr]->edma_inuse)) {
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/* Record our current beginning slot */
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if (count == num_slots)
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stop_slot = i;
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count--;
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set_bit(j, tmp_inuse);
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if (count == 0)
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break;
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} else {
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clear_bit(j, tmp_inuse);
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if (id == EDMA_CONT_PARAMS_FIXED_EXACT) {
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stop_slot = i;
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break;
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} else {
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count = num_slots;
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}
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}
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}
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/*
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* We have to clear any bits that we set
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* if we run out parameter RAM slots, i.e we do find a set
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* of contiguous parameter RAM slots but do not find the exact number
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* requested as we may reach the total number of parameter RAM slots
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*/
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if (i == edma_cc[ctlr]->num_slots)
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stop_slot = i;
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j = start_slot;
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for_each_set_bit_from(j, tmp_inuse, stop_slot)
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clear_bit(j, edma_cc[ctlr]->edma_inuse);
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if (count)
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return -EBUSY;
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for (j = i - num_slots + 1; j <= i; ++j)
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memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(j),
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&dummy_paramset, PARM_SIZE);
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return EDMA_CTLR_CHAN(ctlr, i - num_slots + 1);
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}
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static int prepare_unused_channel_list(struct device *dev, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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@ -818,185 +762,10 @@ void edma_free_slot(unsigned slot)
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}
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EXPORT_SYMBOL(edma_free_slot);
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/**
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* edma_alloc_cont_slots- alloc contiguous parameter RAM slots
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* The API will return the starting point of a set of
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* contiguous parameter RAM slots that have been requested
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*
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* @id: can only be EDMA_CONT_PARAMS_ANY or EDMA_CONT_PARAMS_FIXED_EXACT
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* or EDMA_CONT_PARAMS_FIXED_NOT_EXACT
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* @count: number of contiguous Paramter RAM slots
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* @slot - the start value of Parameter RAM slot that should be passed if id
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* is EDMA_CONT_PARAMS_FIXED_EXACT or EDMA_CONT_PARAMS_FIXED_NOT_EXACT
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*
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* If id is EDMA_CONT_PARAMS_ANY then the API starts looking for a set of
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* contiguous Parameter RAM slots from parameter RAM 64 in the case of
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* DaVinci SOCs and 32 in the case of DA8xx SOCs.
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*
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* If id is EDMA_CONT_PARAMS_FIXED_EXACT then the API starts looking for a
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* set of contiguous parameter RAM slots from the "slot" that is passed as an
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* argument to the API.
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*
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* If id is EDMA_CONT_PARAMS_FIXED_NOT_EXACT then the API initially tries
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* starts looking for a set of contiguous parameter RAMs from the "slot"
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* that is passed as an argument to the API. On failure the API will try to
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* find a set of contiguous Parameter RAM slots from the remaining Parameter
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* RAM slots
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*/
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int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
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{
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/*
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* The start slot requested should be greater than
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* the number of channels and lesser than the total number
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* of slots
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*/
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if ((id != EDMA_CONT_PARAMS_ANY) &&
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(slot < edma_cc[ctlr]->num_channels ||
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slot >= edma_cc[ctlr]->num_slots))
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return -EINVAL;
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/*
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* The number of parameter RAM slots requested cannot be less than 1
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* and cannot be more than the number of slots minus the number of
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* channels
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*/
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if (count < 1 || count >
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(edma_cc[ctlr]->num_slots - edma_cc[ctlr]->num_channels))
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return -EINVAL;
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switch (id) {
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case EDMA_CONT_PARAMS_ANY:
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return reserve_contiguous_slots(ctlr, id, count,
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edma_cc[ctlr]->num_channels);
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case EDMA_CONT_PARAMS_FIXED_EXACT:
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case EDMA_CONT_PARAMS_FIXED_NOT_EXACT:
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return reserve_contiguous_slots(ctlr, id, count, slot);
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default:
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return -EINVAL;
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}
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}
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EXPORT_SYMBOL(edma_alloc_cont_slots);
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/**
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* edma_free_cont_slots - deallocate DMA parameter RAM slots
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* @slot: first parameter RAM of a set of parameter RAM slots to be freed
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* @count: the number of contiguous parameter RAM slots to be freed
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*
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* This deallocates the parameter RAM slots allocated by
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* edma_alloc_cont_slots.
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* Callers/applications need to keep track of sets of contiguous
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* parameter RAM slots that have been allocated using the edma_alloc_cont_slots
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* API.
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* Callers are responsible for ensuring the slots are inactive, and will
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* not be activated.
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*/
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int edma_free_cont_slots(unsigned slot, int count)
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{
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unsigned ctlr, slot_to_free;
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int i;
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_cc[ctlr]->num_channels ||
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slot >= edma_cc[ctlr]->num_slots ||
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count < 1)
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return -EINVAL;
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for (i = slot; i < slot + count; ++i) {
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ctlr = EDMA_CTLR(i);
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slot_to_free = EDMA_CHAN_SLOT(i);
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memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot_to_free),
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&dummy_paramset, PARM_SIZE);
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clear_bit(slot_to_free, edma_cc[ctlr]->edma_inuse);
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}
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return 0;
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}
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EXPORT_SYMBOL(edma_free_cont_slots);
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/*-----------------------------------------------------------------------*/
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/* Parameter RAM operations (i) -- read/write partial slots */
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/**
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* edma_set_src - set initial DMA source address in parameter RAM slot
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* @slot: parameter RAM slot being configured
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* @src_port: physical address of source (memory, controller FIFO, etc)
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* @addressMode: INCR, except in very rare cases
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* @fifoWidth: ignored unless @addressMode is FIFO, else specifies the
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* width to use when addressing the fifo (e.g. W8BIT, W32BIT)
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*
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* Note that the source address is modified during the DMA transfer
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* according to edma_set_src_index().
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*/
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void edma_set_src(unsigned slot, dma_addr_t src_port,
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enum address_mode mode, enum fifo_width width)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_cc[ctlr]->num_slots) {
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unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
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if (mode) {
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/* set SAM and program FWID */
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i = (i & ~(EDMA_FWID)) | (SAM | ((width & 0x7) << 8));
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} else {
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/* clear SAM */
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i &= ~SAM;
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}
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edma_parm_write(ctlr, PARM_OPT, slot, i);
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/* set the source port address
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in source register of param structure */
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edma_parm_write(ctlr, PARM_SRC, slot, src_port);
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}
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}
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EXPORT_SYMBOL(edma_set_src);
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/**
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* edma_set_dest - set initial DMA destination address in parameter RAM slot
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* @slot: parameter RAM slot being configured
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* @dest_port: physical address of destination (memory, controller FIFO, etc)
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* @addressMode: INCR, except in very rare cases
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* @fifoWidth: ignored unless @addressMode is FIFO, else specifies the
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* width to use when addressing the fifo (e.g. W8BIT, W32BIT)
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*
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* Note that the destination address is modified during the DMA transfer
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* according to edma_set_dest_index().
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*/
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void edma_set_dest(unsigned slot, dma_addr_t dest_port,
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enum address_mode mode, enum fifo_width width)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_cc[ctlr]->num_slots) {
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unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
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if (mode) {
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/* set DAM and program FWID */
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i = (i & ~(EDMA_FWID)) | (DAM | ((width & 0x7) << 8));
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} else {
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/* clear DAM */
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i &= ~DAM;
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}
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edma_parm_write(ctlr, PARM_OPT, slot, i);
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/* set the destination port address
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in dest register of param structure */
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edma_parm_write(ctlr, PARM_DST, slot, dest_port);
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}
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}
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EXPORT_SYMBOL(edma_set_dest);
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/**
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* edma_get_position - returns the current transfer point
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* @slot: parameter RAM slot being examined
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@ -1016,110 +785,6 @@ dma_addr_t edma_get_position(unsigned slot, bool dst)
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return edma_read(ctlr, offs);
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}
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/**
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* edma_set_src_index - configure DMA source address indexing
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* @slot: parameter RAM slot being configured
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* @src_bidx: byte offset between source arrays in a frame
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* @src_cidx: byte offset between source frames in a block
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*
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* Offsets are specified to support either contiguous or discontiguous
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* memory transfers, or repeated access to a hardware register, as needed.
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* When accessing hardware registers, both offsets are normally zero.
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*/
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void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_cc[ctlr]->num_slots) {
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edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
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0xffff0000, src_bidx);
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edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
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0xffff0000, src_cidx);
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}
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}
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EXPORT_SYMBOL(edma_set_src_index);
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/**
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* edma_set_dest_index - configure DMA destination address indexing
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* @slot: parameter RAM slot being configured
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* @dest_bidx: byte offset between destination arrays in a frame
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* @dest_cidx: byte offset between destination frames in a block
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*
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* Offsets are specified to support either contiguous or discontiguous
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* memory transfers, or repeated access to a hardware register, as needed.
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* When accessing hardware registers, both offsets are normally zero.
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*/
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void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_cc[ctlr]->num_slots) {
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edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
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0x0000ffff, dest_bidx << 16);
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edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
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0x0000ffff, dest_cidx << 16);
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}
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}
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EXPORT_SYMBOL(edma_set_dest_index);
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/**
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* edma_set_transfer_params - configure DMA transfer parameters
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* @slot: parameter RAM slot being configured
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* @acnt: how many bytes per array (at least one)
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* @bcnt: how many arrays per frame (at least one)
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* @ccnt: how many frames per block (at least one)
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* @bcnt_rld: used only for A-Synchronized transfers; this specifies
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* the value to reload into bcnt when it decrements to zero
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* @sync_mode: ASYNC or ABSYNC
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*
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* See the EDMA3 documentation to understand how to configure and link
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* transfers using the fields in PaRAM slots. If you are not doing it
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* all at once with edma_write_slot(), you will use this routine
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* plus two calls each for source and destination, setting the initial
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* address and saying how to index that address.
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*
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* An example of an A-Synchronized transfer is a serial link using a
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* single word shift register. In that case, @acnt would be equal to
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* that word size; the serial controller issues a DMA synchronization
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* event to transfer each word, and memory access by the DMA transfer
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* controller will be word-at-a-time.
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*
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* An example of an AB-Synchronized transfer is a device using a FIFO.
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* In that case, @acnt equals the FIFO width and @bcnt equals its depth.
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* The controller with the FIFO issues DMA synchronization events when
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* the FIFO threshold is reached, and the DMA transfer controller will
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* transfer one frame to (or from) the FIFO. It will probably use
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* efficient burst modes to access memory.
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*/
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void edma_set_transfer_params(unsigned slot,
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u16 acnt, u16 bcnt, u16 ccnt,
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u16 bcnt_rld, enum sync_dimension sync_mode)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_cc[ctlr]->num_slots) {
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edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot,
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0x0000ffff, bcnt_rld << 16);
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if (sync_mode == ASYNC)
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edma_parm_and(ctlr, PARM_OPT, slot, ~SYNCDIM);
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else
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edma_parm_or(ctlr, PARM_OPT, slot, SYNCDIM);
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/* Set the acount, bcount, ccount registers */
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edma_parm_write(ctlr, PARM_A_B_CNT, slot, (bcnt << 16) | acnt);
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edma_parm_write(ctlr, PARM_CCNT, slot, ccnt);
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}
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}
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EXPORT_SYMBOL(edma_set_transfer_params);
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/**
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* edma_link - link one parameter RAM slot to another
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* @from: parameter RAM slot originating the link
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@ -1145,26 +810,6 @@ void edma_link(unsigned from, unsigned to)
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}
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EXPORT_SYMBOL(edma_link);
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/**
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* edma_unlink - cut link from one parameter RAM slot
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* @from: parameter RAM slot originating the link
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*
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* The originating slot should not be part of any active DMA transfer.
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* Its link is set to 0xffff.
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*/
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void edma_unlink(unsigned from)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(from);
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from = EDMA_CHAN_SLOT(from);
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if (from >= edma_cc[ctlr]->num_slots)
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return;
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edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff);
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}
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EXPORT_SYMBOL(edma_unlink);
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/*-----------------------------------------------------------------------*/
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/* Parameter RAM operations (ii) -- read/write whole parameter sets */
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@ -1401,27 +1046,6 @@ void edma_clean_channel(unsigned channel)
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}
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EXPORT_SYMBOL(edma_clean_channel);
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/*
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* edma_clear_event - clear an outstanding event on the DMA channel
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* Arguments:
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* channel - channel number
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*/
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void edma_clear_event(unsigned channel)
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{
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unsigned ctlr;
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ctlr = EDMA_CTLR(channel);
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channel = EDMA_CHAN_SLOT(channel);
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if (channel >= edma_cc[ctlr]->num_channels)
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return;
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if (channel < 32)
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edma_write(ctlr, EDMA_ECR, BIT(channel));
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else
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edma_write(ctlr, EDMA_ECRH, BIT(channel - 32));
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}
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EXPORT_SYMBOL(edma_clear_event);
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/*
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* edma_assign_channel_eventq - move given channel to desired eventq
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* Arguments:
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@ -72,20 +72,6 @@ struct edmacc_param {
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#define EDMA_DMA_TC1_ERROR 3
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#define EDMA_DMA_TC2_ERROR 4
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enum address_mode {
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INCR = 0,
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FIFO = 1
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};
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enum fifo_width {
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W8BIT = 0,
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W16BIT = 1,
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W32BIT = 2,
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W64BIT = 3,
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W128BIT = 4,
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W256BIT = 5
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};
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enum dma_event_q {
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EVENTQ_0 = 0,
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EVENTQ_1 = 1,
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@ -94,11 +80,6 @@ enum dma_event_q {
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EVENTQ_DEFAULT = -1
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};
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enum sync_dimension {
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ASYNC = 0,
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ABSYNC = 1
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};
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#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
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#define EDMA_CTLR(i) ((i) >> 16)
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#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
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@ -121,22 +102,9 @@ void edma_free_channel(unsigned channel);
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int edma_alloc_slot(unsigned ctlr, int slot);
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||||
void edma_free_slot(unsigned slot);
|
||||
|
||||
/* alloc/free a set of contiguous parameter RAM slots */
|
||||
int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
|
||||
int edma_free_cont_slots(unsigned slot, int count);
|
||||
|
||||
/* calls that operate on part of a parameter RAM slot */
|
||||
void edma_set_src(unsigned slot, dma_addr_t src_port,
|
||||
enum address_mode mode, enum fifo_width);
|
||||
void edma_set_dest(unsigned slot, dma_addr_t dest_port,
|
||||
enum address_mode mode, enum fifo_width);
|
||||
dma_addr_t edma_get_position(unsigned slot, bool dst);
|
||||
void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
|
||||
void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
|
||||
void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
|
||||
u16 bcnt_rld, enum sync_dimension sync_mode);
|
||||
void edma_link(unsigned from, unsigned to);
|
||||
void edma_unlink(unsigned from);
|
||||
|
||||
/* calls that operate on an entire parameter RAM slot */
|
||||
void edma_write_slot(unsigned slot, const struct edmacc_param *params);
|
||||
@ -146,7 +114,6 @@ void edma_read_slot(unsigned slot, struct edmacc_param *params);
|
||||
int edma_start(unsigned channel);
|
||||
void edma_stop(unsigned channel);
|
||||
void edma_clean_channel(unsigned channel);
|
||||
void edma_clear_event(unsigned channel);
|
||||
void edma_pause(unsigned channel);
|
||||
void edma_resume(unsigned channel);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user