Staging: sm750fb: Add space after ','
This patch adds space after ',' for the better readability of code. This issue is detected by checkpatch.pl Signed-off-by: Somya Anand <somyaanand214@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
b30edfcd04
commit
d2a6037738
@ -24,16 +24,16 @@
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#include "ddk750.h"
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#include "sm750_accel.h"
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int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev)
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int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev)
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{
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int ret;
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struct sm750_share * spec_share;
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spec_share = container_of(share,struct sm750_share,share);
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spec_share = container_of(share, struct sm750_share,share);
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ret = 0;
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share->vidreg_start = pci_resource_start(pdev,1);
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share->vidreg_start = pci_resource_start(pdev, 1);
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share->vidreg_size = MB(2);
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pr_info("mmio phyAddr = %lx\n", share->vidreg_start);
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@ -44,29 +44,29 @@ int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev)
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* successfully
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* */
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if((ret = pci_request_region(pdev,1,"sm750fb")))
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if((ret = pci_request_region(pdev, 1, "sm750fb")))
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{
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pr_err("Can not request PCI regions.\n");
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goto exit;
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}
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/* now map mmio and vidmem*/
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share->pvReg = ioremap_nocache(share->vidreg_start,share->vidreg_size);
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share->pvReg = ioremap_nocache(share->vidreg_start, share->vidreg_size);
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if(!share->pvReg){
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pr_err("mmio failed\n");
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ret = -EFAULT;
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goto exit;
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}else{
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pr_info("mmio virtual addr = %p\n",share->pvReg);
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pr_info("mmio virtual addr = %p\n", share->pvReg);
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}
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share->accel.dprBase = share->pvReg + DE_BASE_ADDR_TYPE1;
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share->accel.dpPortBase = share->pvReg + DE_PORT_ADDR_TYPE1;
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ddk750_set_mmio(share->pvReg,share->devid,share->revid);
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ddk750_set_mmio(share->pvReg,share->devid, share->revid);
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share->vidmem_start = pci_resource_start(pdev,0);
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share->vidmem_start = pci_resource_start(pdev, 0);
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/* don't use pdev_resource[x].end - resource[x].start to
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* calculate the resource size,its only the maximum available
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* size but not the actual size,use
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@ -74,7 +74,7 @@ int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev)
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* */
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share->vidmem_size = hw_sm750_getVMSize(share);
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pr_info("video memory phyAddr = %lx, size = %u bytes\n",
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share->vidmem_start,share->vidmem_size);
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share->vidmem_start, share->vidmem_size);
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/* reserve the vidmem space of smi adaptor */
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#if 0
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@ -93,7 +93,7 @@ int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev)
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ret = -EFAULT;
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goto exit;
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}else{
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pr_info("video memory vaddr = %p\n",share->pvMem);
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pr_info("video memory vaddr = %p\n", share->pvMem);
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}
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exit:
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return ret;
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@ -101,12 +101,12 @@ exit:
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int hw_sm750_inithw(struct lynx_share* share,struct pci_dev * pdev)
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int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
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{
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struct sm750_share * spec_share;
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struct init_status * parm;
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spec_share = container_of(share,struct sm750_share,share);
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spec_share = container_of(share, struct sm750_share,share);
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parm = &spec_share->state.initParm;
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if(parm->chip_clk == 0)
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parm->chip_clk = (getChipType() == SM750LE)?
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@ -122,7 +122,7 @@ int hw_sm750_inithw(struct lynx_share* share,struct pci_dev * pdev)
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/* for sm718,open pci burst */
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if(share->devid == 0x718){
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POKE32(SYSTEM_CTRL,
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FIELD_SET(PEEK32(SYSTEM_CTRL),SYSTEM_CTRL,PCI_BURST,ON));
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FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON));
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}
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/* sm750 use sii164, it can be setup with default value
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@ -138,22 +138,22 @@ int hw_sm750_inithw(struct lynx_share* share,struct pci_dev * pdev)
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POKE32(MISC_CTRL,
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FIELD_SET(PEEK32(MISC_CTRL),
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MISC_CTRL,
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DAC_POWER,OFF));
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DAC_POWER, OFF));
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/* shut off dpms */
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POKE32(SYSTEM_CTRL,
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FIELD_SET(PEEK32(SYSTEM_CTRL),
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SYSTEM_CTRL,
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DPMS,VNHN));
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DPMS, VNHN));
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}else{
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POKE32(MISC_CTRL,
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FIELD_SET(PEEK32(MISC_CTRL),
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MISC_CTRL,
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DAC_POWER,ON));
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DAC_POWER, ON));
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/* turn on dpms */
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POKE32(SYSTEM_CTRL,
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FIELD_SET(PEEK32(SYSTEM_CTRL),
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SYSTEM_CTRL,
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DPMS,VPHP));
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DPMS, VPHP));
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}
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switch (spec_share->state.pnltype){
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@ -211,7 +211,7 @@ resource_size_t hw_sm750_getVMSize(struct lynx_share * share)
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int hw_sm750_output_checkMode(struct lynxfb_output* output,struct fb_var_screeninfo* var)
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int hw_sm750_output_checkMode(struct lynxfb_output* output, struct fb_var_screeninfo* var)
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{
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return 0;
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@ -219,7 +219,7 @@ int hw_sm750_output_checkMode(struct lynxfb_output* output,struct fb_var_screeni
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int hw_sm750_output_setMode(struct lynxfb_output* output,
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struct fb_var_screeninfo* var,struct fb_fix_screeninfo* fix)
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struct fb_var_screeninfo* var, struct fb_fix_screeninfo* fix)
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{
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int ret;
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disp_output_t dispSet;
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@ -252,7 +252,7 @@ int hw_sm750_output_setMode(struct lynxfb_output* output,
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u32 reg;
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reg = PEEK32(DISPLAY_CONTROL_750LE);
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reg |= 0xf;
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POKE32(DISPLAY_CONTROL_750LE,reg);
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POKE32(DISPLAY_CONTROL_750LE, reg);
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}
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pr_info("ddk setlogicdispout done \n");
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@ -265,12 +265,12 @@ void hw_sm750_output_clear(struct lynxfb_output* output)
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return;
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}
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int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc,struct fb_var_screeninfo* var)
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int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* var)
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{
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struct lynx_share * share;
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share = container_of(crtc,struct lynxfb_par,crtc)->share;
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share = container_of(crtc, struct lynxfb_par,crtc)->share;
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switch (var->bits_per_pixel){
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case 8:
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@ -307,7 +307,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
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ret = 0;
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par = container_of(crtc,struct lynxfb_par,crtc);
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par = container_of(crtc, struct lynxfb_par, crtc);
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share = par->share;
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#if 1
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if(!share->accel_off){
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@ -324,7 +324,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
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fmt = 2;
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break;
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}
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hw_set2dformat(&share->accel,fmt);
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hw_set2dformat(&share->accel, fmt);
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}
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#endif
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@ -349,8 +349,8 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
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else
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clock = SECONDARY_PLL;
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pr_debug("Request pixel clock = %lu\n",modparm.pixel_clock);
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ret = ddk750_setModeTiming(&modparm,clock);
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pr_debug("Request pixel clock = %lu\n", modparm.pixel_clock);
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ret = ddk750_setModeTiming(&modparm, clock);
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if(ret){
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pr_err("Set mode timing failed\n");
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goto exit;
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@ -359,54 +359,54 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
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if(crtc->channel != sm750_secondary){
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/* set pitch, offset ,width,start address ,etc... */
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POKE32(PANEL_FB_ADDRESS,
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FIELD_SET(0,PANEL_FB_ADDRESS,STATUS,CURRENT)|
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FIELD_SET(0,PANEL_FB_ADDRESS,EXT,LOCAL)|
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FIELD_VALUE(0,PANEL_FB_ADDRESS,ADDRESS,crtc->oScreen));
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FIELD_SET(0, PANEL_FB_ADDRESS, STATUS, CURRENT)|
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FIELD_SET(0, PANEL_FB_ADDRESS, EXT, LOCAL)|
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FIELD_VALUE(0, PANEL_FB_ADDRESS, ADDRESS, crtc->oScreen));
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reg = var->xres * (var->bits_per_pixel >> 3);
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/* crtc->channel is not equal to par->index on numeric,be aware of that */
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reg = PADDING(crtc->line_pad,reg);
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POKE32(PANEL_FB_WIDTH,
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FIELD_VALUE(0,PANEL_FB_WIDTH,WIDTH,reg)|
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FIELD_VALUE(0,PANEL_FB_WIDTH,OFFSET,fix->line_length));
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FIELD_VALUE(0, PANEL_FB_WIDTH, WIDTH, reg)|
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FIELD_VALUE(0, PANEL_FB_WIDTH, OFFSET, fix->line_length));
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POKE32(PANEL_WINDOW_WIDTH,
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FIELD_VALUE(0,PANEL_WINDOW_WIDTH,WIDTH,var->xres -1)|
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FIELD_VALUE(0,PANEL_WINDOW_WIDTH,X,var->xoffset));
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FIELD_VALUE(0, PANEL_WINDOW_WIDTH, WIDTH, var->xres -1)|
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FIELD_VALUE(0, PANEL_WINDOW_WIDTH, X, var->xoffset));
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POKE32(PANEL_WINDOW_HEIGHT,
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FIELD_VALUE(0,PANEL_WINDOW_HEIGHT,HEIGHT,var->yres_virtual - 1)|
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FIELD_VALUE(0,PANEL_WINDOW_HEIGHT,Y,var->yoffset));
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FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, HEIGHT, var->yres_virtual - 1)|
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FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, Y, var->yoffset));
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POKE32(PANEL_PLANE_TL,0);
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POKE32(PANEL_PLANE_TL, 0);
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POKE32(PANEL_PLANE_BR,
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FIELD_VALUE(0,PANEL_PLANE_BR,BOTTOM,var->yres - 1)|
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FIELD_VALUE(0,PANEL_PLANE_BR,RIGHT,var->xres - 1));
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FIELD_VALUE(0, PANEL_PLANE_BR, BOTTOM, var->yres - 1)|
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FIELD_VALUE(0, PANEL_PLANE_BR,RIGHT, var->xres - 1));
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/* set pixel format */
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reg = PEEK32(PANEL_DISPLAY_CTRL);
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POKE32(PANEL_DISPLAY_CTRL,
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FIELD_VALUE(reg,
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PANEL_DISPLAY_CTRL,FORMAT,
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PANEL_DISPLAY_CTRL, FORMAT,
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(var->bits_per_pixel >> 4)
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));
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}else{
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/* not implemented now */
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POKE32(CRT_FB_ADDRESS,crtc->oScreen);
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POKE32(CRT_FB_ADDRESS, crtc->oScreen);
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reg = var->xres * (var->bits_per_pixel >> 3);
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/* crtc->channel is not equal to par->index on numeric,be aware of that */
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reg = PADDING(crtc->line_pad,reg);
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reg = PADDING(crtc->line_pad, reg);
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POKE32(CRT_FB_WIDTH,
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FIELD_VALUE(0,CRT_FB_WIDTH,WIDTH,reg)|
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FIELD_VALUE(0,CRT_FB_WIDTH,OFFSET,fix->line_length));
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FIELD_VALUE(0, CRT_FB_WIDTH, WIDTH, reg)|
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FIELD_VALUE(0, CRT_FB_WIDTH, OFFSET, fix->line_length));
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/* SET PIXEL FORMAT */
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reg = PEEK32(CRT_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg,CRT_DISPLAY_CTRL,FORMAT,var->bits_per_pixel >> 4);
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POKE32(CRT_DISPLAY_CTRL,reg);
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reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, FORMAT, var->bits_per_pixel >> 4);
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POKE32(CRT_DISPLAY_CTRL, reg);
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}
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@ -421,15 +421,15 @@ void hw_sm750_crtc_clear(struct lynxfb_crtc* crtc)
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return;
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}
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int hw_sm750_setColReg(struct lynxfb_crtc* crtc,ushort index,
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ushort red,ushort green,ushort blue)
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int hw_sm750_setColReg(struct lynxfb_crtc* crtc, ushort index,
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ushort red, ushort green, ushort blue)
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{
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static unsigned int add[]={PANEL_PALETTE_RAM,CRT_PALETTE_RAM};
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POKE32(add[crtc->channel] + index*4 ,(red<<16)|(green<<8)|blue);
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POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue);
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return 0;
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}
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int hw_sm750le_setBLANK(struct lynxfb_output * output,int blank){
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int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){
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int dpms,crtdb;
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switch(blank)
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@ -477,15 +477,15 @@ int hw_sm750le_setBLANK(struct lynxfb_output * output,int blank){
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}
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if(output->paths & sm750_crt){
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POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL),CRT_DISPLAY_CTRL,DPMS,dpms));
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POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL),CRT_DISPLAY_CTRL,BLANK,crtdb));
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
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}
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return 0;
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}
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int hw_sm750_setBLANK(struct lynxfb_output* output,int blank)
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{
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unsigned int dpms,pps,crtdb;
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unsigned int dpms, pps, crtdb;
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dpms = pps = crtdb = 0;
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@ -540,12 +540,12 @@ int hw_sm750_setBLANK(struct lynxfb_output* output,int blank)
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if(output->paths & sm750_crt){
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POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL),SYSTEM_CTRL,DPMS,dpms));
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POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL),CRT_DISPLAY_CTRL,BLANK,crtdb));
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POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms));
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POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL,BLANK, crtdb));
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}
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if(output->paths & sm750_panel){
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POKE32(PANEL_DISPLAY_CTRL,FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL),PANEL_DISPLAY_CTRL,DATA,pps));
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POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps));
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}
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return 0;
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@ -559,22 +559,22 @@ void hw_sm750_initAccel(struct lynx_share * share)
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if(getChipType() == SM750LE){
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reg = PEEK32(DE_STATE1);
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reg = FIELD_SET(reg,DE_STATE1,DE_ABORT,ON);
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reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,ON);
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POKE32(DE_STATE1,reg);
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reg = PEEK32(DE_STATE1);
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reg = FIELD_SET(reg,DE_STATE1,DE_ABORT,OFF);
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POKE32(DE_STATE1,reg);
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reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,OFF);
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POKE32(DE_STATE1, reg);
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}else{
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/* engine reset */
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reg = PEEK32(SYSTEM_CTRL);
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reg = FIELD_SET(reg,SYSTEM_CTRL,DE_ABORT,ON);
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POKE32(SYSTEM_CTRL,reg);
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reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,ON);
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POKE32(SYSTEM_CTRL, reg);
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reg = PEEK32(SYSTEM_CTRL);
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reg = FIELD_SET(reg,SYSTEM_CTRL,DE_ABORT,OFF);
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POKE32(SYSTEM_CTRL,reg);
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reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,OFF);
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POKE32(SYSTEM_CTRL, reg);
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}
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/* call 2d init */
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@ -586,9 +586,9 @@ int hw_sm750le_deWait(void)
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int i=0x10000000;
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while(i--){
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unsigned int dwVal = PEEK32(DE_STATE2);
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if((FIELD_GET(dwVal,DE_STATE2,DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) &&
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(FIELD_GET(dwVal,DE_STATE2,DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) &&
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(FIELD_GET(dwVal,DE_STATE2,DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY))
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if((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) &&
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(FIELD_GET(dwVal, DE_STATE2, DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) &&
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(FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY))
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{
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return 0;
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}
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