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phy: renesas: r8a779f0-eth-serdes: Add .power_on() into phy_ops

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Add r8a779f0_eth_serdes_power_on() to initialize the hardware for
each channel from the step 9 or later on the datasheet. In other words,
the procedure from the step 1 to 8 is for all channel and it is needed
once only. So, the .init() in any channel instance is called, this
driver initializes the hardware from step 1 to 8. And then, .power_on()
is called, this driver initializes the hardware from step 9 or later.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20221226065316.3895480-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Yoshihiro Shimoda 2022-12-26 15:53:15 +09:00 committed by Vinod Koul
parent 4214f371d5
commit d2aa66a992
1 changed files with 29 additions and 28 deletions
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57
drivers/phy/renesas/r8a779f0-ether-serdes.c
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@ -242,34 +242,7 @@ static int r8a779f0_eth_serdes_hw_init(struct r8a779f0_eth_serdes_channel *chann
if (ret) if (ret)
return ret; return ret;
ret = r8a779f0_eth_serdes_reg_wait(&dd->channel[0], 0x0000, 0x380, BIT(15), 0); return r8a779f0_eth_serdes_reg_wait(&dd->channel[0], 0x0000, 0x380, BIT(15), 0);
if (ret)
return ret;
for (i = 0; i < R8A779F0_ETH_SERDES_NUM; i++) {
ret = r8a779f0_eth_serdes_chan_setting(&dd->channel[i]);
if (ret)
return ret;
}
for (i = 0; i < R8A779F0_ETH_SERDES_NUM; i++) {
ret = r8a779f0_eth_serdes_chan_speed(&dd->channel[i]);
if (ret)
return ret;
}
for (i = 0; i < R8A779F0_ETH_SERDES_NUM; i++)
r8a779f0_eth_serdes_write32(dd->channel[i].addr, 0x03c0, 0x380, 0x0000);
for (i = 0; i < R8A779F0_ETH_SERDES_NUM; i++)
r8a779f0_eth_serdes_write32(dd->channel[i].addr, 0x03d0, 0x380, 0x0000);
for (i = 0; i < R8A779F0_ETH_SERDES_NUM; i++) {
ret = r8a779f0_eth_serdes_monitor_linkup(&dd->channel[i]);
if (ret)
return ret;
}
return 0;
} }
static int r8a779f0_eth_serdes_init(struct phy *p) static int r8a779f0_eth_serdes_init(struct phy *p)
@ -289,6 +262,33 @@ static int r8a779f0_eth_serdes_init(struct phy *p)
return ret; return ret;
} }
static int r8a779f0_eth_serdes_hw_init_late(struct r8a779f0_eth_serdes_channel
*channel)
{
int ret;
ret = r8a779f0_eth_serdes_chan_setting(channel);
if (ret)
return ret;
ret = r8a779f0_eth_serdes_chan_speed(channel);
if (ret)
return ret;
r8a779f0_eth_serdes_write32(channel->addr, 0x03c0, 0x380, 0x0000);
r8a779f0_eth_serdes_write32(channel->addr, 0x03d0, 0x380, 0x0000);
return r8a779f0_eth_serdes_monitor_linkup(channel);
}
static int r8a779f0_eth_serdes_power_on(struct phy *p)
{
struct r8a779f0_eth_serdes_channel *channel = phy_get_drvdata(p);
return r8a779f0_eth_serdes_hw_init_late(channel);
}
static int r8a779f0_eth_serdes_set_mode(struct phy *p, enum phy_mode mode, static int r8a779f0_eth_serdes_set_mode(struct phy *p, enum phy_mode mode,
int submode) int submode)
{ {
@ -319,6 +319,7 @@ static int r8a779f0_eth_serdes_set_speed(struct phy *p, int speed)
static const struct phy_ops r8a779f0_eth_serdes_ops = { static const struct phy_ops r8a779f0_eth_serdes_ops = {
.init = r8a779f0_eth_serdes_init, .init = r8a779f0_eth_serdes_init,
.power_on = r8a779f0_eth_serdes_power_on,
.set_mode = r8a779f0_eth_serdes_set_mode, .set_mode = r8a779f0_eth_serdes_set_mode,
.set_speed = r8a779f0_eth_serdes_set_speed, .set_speed = r8a779f0_eth_serdes_set_speed,
}; };