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drm/amd/pm: smu7_hwmgr: fix potential off-by-one overflow in 'performance_levels'

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Since 'hardwareActivityPerformanceLevels' is set to the size of the
'performance_levels' array in smu7_hwmgr_backend_init(), using the
'<=' assertion to check for the next index value is incorrect.
Replace it with '<'.

Detected using the static analysis tool - Svace.
Fixes: 599a7e9fe1b6 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alexey Kodanev <aleksei.kodanev@bell-sw.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alexey Kodanev 2022-10-04 11:14:02 +03:00 committed by Alex Deucher
parent 2cc4a5914c
commit d2bd0831b5
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
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@ -3603,7 +3603,7 @@ static int smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr,
return -EINVAL);
PP_ASSERT_WITH_CODE(
(smu7_power_state->performance_level_count <=
(smu7_power_state->performance_level_count <
hwmgr->platform_descriptor.hardwareActivityPerformanceLevels),
"Performance levels exceeds Driver limit!",
return -EINVAL);