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kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table

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So far we have only supported 3 level page table with fixed IPA of
40bits, where PUD is folded. With 4 level page tables, we need
to check if the PUD entry is valid or not. Fix stage2_flush_memslot()
to do this check, before walking down the table.

Acked-by: Christoffer Dall <cdall@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Suzuki K Poulose 2018-09-26 17:32:37 +01:00 committed by Marc Zyngier
parent 6bf4ca7fbc
commit d2db7773ba
1 changed files with 2 additions and 1 deletions
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3
virt/kvm/arm/mmu.c
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@ -412,7 +412,8 @@ static void stage2_flush_memslot(struct kvm *kvm,
pgd = kvm->arch.pgd + stage2_pgd_index(addr); pgd = kvm->arch.pgd + stage2_pgd_index(addr);
do { do {
next = stage2_pgd_addr_end(addr, end); next = stage2_pgd_addr_end(addr, end);
stage2_flush_puds(kvm, pgd, addr, next); if (!stage2_pgd_none(*pgd))
stage2_flush_puds(kvm, pgd, addr, next);
} while (pgd++, addr = next, addr != end); } while (pgd++, addr = next, addr != end);
} }