net-next:asix: reduce AX88772 init time by about 2 seconds
ax88772_reset takes about 2 seconds and is called twice. Once from ax88772_bind() directly and again indirectly from usbnet_open(). Reset the USB FW/Phy enough to blink the LEDs when inserted. Signed-off-by: Allan Chou <allan@asix.com.tw> Signed-off-by: Grant Grundler <grundler@chromium.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1083,7 +1083,7 @@ static const struct net_device_ops ax88772_netdev_ops = {
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static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
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{
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int ret;
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int ret, embd_phy;
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struct asix_data *data = (struct asix_data *)&dev->data;
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u8 buf[ETH_ALEN];
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u32 phyid;
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@ -1108,16 +1108,36 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
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dev->mii.reg_num_mask = 0x1f;
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dev->mii.phy_id = asix_get_phy_addr(dev);
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phyid = asix_get_phyid(dev);
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dbg("PHYID=0x%08x", phyid);
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dev->net->netdev_ops = &ax88772_netdev_ops;
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dev->net->ethtool_ops = &ax88772_ethtool_ops;
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ret = ax88772_reset(dev);
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embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
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/* Reset the PHY to normal operation mode */
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ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
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if (ret < 0) {
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dbg("Select PHY #1 failed: %d", ret);
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return ret;
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}
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ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
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if (ret < 0)
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return ret;
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msleep(150);
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ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
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if (ret < 0)
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return ret;
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msleep(150);
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ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
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/* Read PHYID register *AFTER* the PHY was reset properly */
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phyid = asix_get_phyid(dev);
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dbg("PHYID=0x%08x", phyid);
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/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
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if (dev->driver_info->flags & FLAG_FRAMING_AX) {
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/* hard_mtu is still the default - the device does not support
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