pinctrl: renesas: rzg2l: Add pin configuration support for pinmux groups
On RZ/G3S different Ethernet pins need to be configured with different settings (e.g. power-source needs to be set, RGMII TXC and TX_CTL pins need output-enable). Adjust the driver to allow specifying pin configuration for pinmux groups. With this, DT settings like the following are taken into account by the driver: eth0_pins: eth0 { tx_ctl { pinmux = <RZG2L_PORT_PINMUX(1, 1, 1)>; /* ET0_TX_CTL */ power-source = <1800>; output-enable; drive-strength-microamp = <5200>; }; }; Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231207070700.4156557-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -376,8 +376,11 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
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goto done;
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}
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if (num_pinmux)
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if (num_pinmux) {
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nmaps += 1;
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if (num_configs)
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nmaps += 1;
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}
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if (num_pins)
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nmaps += num_pins;
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@ -462,6 +465,16 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
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maps[idx].data.mux.function = name;
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idx++;
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if (num_configs) {
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ret = rzg2l_map_add_config(&maps[idx], name,
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PIN_MAP_TYPE_CONFIGS_GROUP,
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configs, num_configs);
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if (ret < 0)
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goto remove_group;
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idx++;
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}
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dev_dbg(pctrl->dev, "Parsed %pOF with %d pins\n", np, num_pinmux);
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ret = 0;
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goto done;
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