ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
Since header mach/regs-s3c2412-mem.h is used only into mach-s3c24xx/, this patch moves the header file in local. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -25,12 +25,13 @@
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#include <asm/mach/map.h>
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#include <mach/regs-clock.h>
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#include <mach/regs-s3c2412-mem.h>
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#include <plat/cpu.h>
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#include <plat/clock.h>
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#include <plat/cpu-freq-core.h>
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#include "s3c2412.h"
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/* our clock resources. */
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static struct clk *xtal;
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static struct clk *fclk;
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@ -1,48 +0,0 @@
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/* arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h
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*
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* S3C2412 memory register definitions
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*/
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#ifndef __ASM_ARM_REGS_S3C2412_MEM
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#define __ASM_ARM_REGS_S3C2412_MEM
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#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
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#define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x))
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#define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x))
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#define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o)))
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#define S3C2412_BANKCFG S3C2412_MEMREG(0x00)
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#define S3C2412_BANKCON1 S3C2412_MEMREG(0x04)
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#define S3C2412_BANKCON2 S3C2412_MEMREG(0x08)
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#define S3C2412_BANKCON3 S3C2412_MEMREG(0x0C)
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#define S3C2412_REFRESH S3C2412_MEMREG(0x10)
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#define S3C2412_TIMEOUT S3C2412_MEMREG(0x14)
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/* EBI control registers */
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#define S3C2412_EBI_PR S3C2412_EBIREG(0x00)
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#define S3C2412_EBI_BANKCFG S3C2412_EBIREG(0x04)
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/* SSMC control registers */
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#define S3C2412_SSMC_BANK(x) S3C2412_SSMC(x, 0x00)
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#define S3C2412_SMIDCYR(x) S3C2412_SSMC(x, 0x00)
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#define S3C2412_SMBWSTRD(x) S3C2412_SSMC(x, 0x04)
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#define S3C2412_SMBWSTWRR(x) S3C2412_SSMC(x, 0x08)
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#define S3C2412_SMBWSTOENR(x) S3C2412_SSMC(x, 0x0C)
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#define S3C2412_SMBWSTWENR(x) S3C2412_SSMC(x, 0x10)
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#define S3C2412_SMBCR(x) S3C2412_SSMC(x, 0x14)
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#define S3C2412_SMBSR(x) S3C2412_SSMC(x, 0x18)
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#define S3C2412_SMBWSTBRDR(x) S3C2412_SSMC(x, 0x1C)
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#endif /* __ASM_ARM_REGS_S3C2412_MEM */
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@ -27,12 +27,12 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <mach/regs-s3c2412-mem.h>
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#include <plat/cpu.h>
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#include <plat/cpu-freq-core.h>
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#include <plat/clock.h>
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#include "s3c2412.h"
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#define print_ns(x) ((x) / 10), ((x) % 10)
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/**
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26
arch/arm/mach-s3c24xx/s3c2412.h
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26
arch/arm/mach-s3c24xx/s3c2412.h
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@ -0,0 +1,26 @@
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/*
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H
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#define __ARCH_ARM_REGS_S3C24XX_S3C2412_H __FILE__
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#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
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#define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x))
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#define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x))
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#define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o)))
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#define S3C2412_REFRESH S3C2412_MEMREG(0x10)
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#define S3C2412_EBI_BANKCFG S3C2412_EBIREG(0x4)
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#define S3C2412_SSMC_BANK(x) S3C2412_SSMC(x, 0x0)
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#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_H */
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