drm/amdgpu: Match against exact bootloader status
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the least significant bits for any command submission. Hence match against the exact register value, otherwise a register value of all 0xFFs also could falsely indicate that boot loader is ready. Also, from PSP v13.0.6 and newer, bits[7:0] will be used to indicate command error status. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -137,14 +137,15 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp)
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int ret;
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int retry_loop;
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/* Wait for bootloader to signify that it is ready having bit 31 of
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* C2PMSG_35 set to 1. All other bits are expected to be cleared.
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* If there is an error in processing command, bits[7:0] will be set.
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* This is applicable for PSP v13.0.6 and newer.
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*/
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for (retry_loop = 0; retry_loop < 10; retry_loop++) {
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/* Wait for bootloader to signify that is
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ready having bit 31 of C2PMSG_35 set to 1 */
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ret = psp_wait_for(psp,
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SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),
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0x80000000,
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0x80000000,
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false);
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ret = psp_wait_for(
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psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),
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0x80000000, 0xffffffff, false);
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if (ret == 0)
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return 0;
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