drm/amd/display: Extend soc BB capabilitiy
[why] Some parts are consuming dangerously close to maximum number of states supported when updating the BB (i.e. 8). [how] Change maximum stages from 9 to 20. Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Jun Lei <jun.lei@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -747,6 +747,7 @@ struct dc_debug_options {
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union aux_wake_wa_options aux_wake_wa;
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uint8_t psr_power_use_phy_fsm;
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enum dml_hostvm_override_opts dml_hostvm_override;
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bool use_legacy_soc_bb_mechanism;
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};
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struct gpu_info_soc_bounding_box_v1_0;
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@ -29,7 +29,7 @@
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#define DC__PRESENT 1
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#define DC__PRESENT__1 1
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#define DC__NUM_DPP 4
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#define DC__VOLTAGE_STATES 9
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#define DC__VOLTAGE_STATES 20
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#define DC__NUM_DPP__4 1
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#define DC__NUM_DPP__0_PRESENT 1
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#define DC__NUM_DPP__1_PRESENT 1
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