KVM: x86: Make kvm_queued_exception a properly named, visible struct
Move the definition of "struct kvm_queued_exception" out of kvm_vcpu_arch in anticipation of adding a second instance in kvm_vcpu_arch to handle exceptions that occur when vectoring an injected exception and are morphed to VM-Exit instead of leading to #DF. Opportunistically take advantage of the churn to rename "nr" to "vector". No functional change intended. Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20220830231614.3580124-15-seanjc@google.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Sean Christopherson
Paolo Bonzini
parent
6ad75c5c99
commit
d4963e319f
@ -641,6 +641,17 @@ struct kvm_vcpu_xen {
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struct timer_list poll_timer;
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};
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struct kvm_queued_exception {
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bool pending;
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bool injected;
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bool has_error_code;
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u8 vector;
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u32 error_code;
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unsigned long payload;
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bool has_payload;
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u8 nested_apf;
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};
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struct kvm_vcpu_arch {
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/*
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* rip and regs accesses must go through
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@ -739,16 +750,8 @@ struct kvm_vcpu_arch {
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u8 event_exit_inst_len;
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struct kvm_queued_exception {
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bool pending;
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bool injected;
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bool has_error_code;
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u8 nr;
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u32 error_code;
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unsigned long payload;
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bool has_payload;
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u8 nested_apf;
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} exception;
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/* Exceptions to be injected to the guest. */
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struct kvm_queued_exception exception;
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struct kvm_queued_interrupt {
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bool injected;
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@ -468,7 +468,7 @@ static void nested_save_pending_event_to_vmcb12(struct vcpu_svm *svm,
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unsigned int nr;
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if (vcpu->arch.exception.injected) {
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nr = vcpu->arch.exception.nr;
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nr = vcpu->arch.exception.vector;
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exit_int_info = nr | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT;
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if (vcpu->arch.exception.has_error_code) {
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@ -1310,42 +1310,45 @@ int nested_svm_check_permissions(struct kvm_vcpu *vcpu)
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static bool nested_exit_on_exception(struct vcpu_svm *svm)
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{
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unsigned int nr = svm->vcpu.arch.exception.nr;
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unsigned int vector = svm->vcpu.arch.exception.vector;
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return (svm->nested.ctl.intercepts[INTERCEPT_EXCEPTION] & BIT(nr));
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return (svm->nested.ctl.intercepts[INTERCEPT_EXCEPTION] & BIT(vector));
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}
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static void nested_svm_inject_exception_vmexit(struct vcpu_svm *svm)
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static void nested_svm_inject_exception_vmexit(struct kvm_vcpu *vcpu)
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{
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unsigned int nr = svm->vcpu.arch.exception.nr;
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struct kvm_queued_exception *ex = &vcpu->arch.exception;
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struct vcpu_svm *svm = to_svm(vcpu);
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struct vmcb *vmcb = svm->vmcb;
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vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
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vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + ex->vector;
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vmcb->control.exit_code_hi = 0;
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if (svm->vcpu.arch.exception.has_error_code)
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vmcb->control.exit_info_1 = svm->vcpu.arch.exception.error_code;
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if (ex->has_error_code)
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vmcb->control.exit_info_1 = ex->error_code;
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/*
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* EXITINFO2 is undefined for all exception intercepts other
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* than #PF.
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*/
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if (nr == PF_VECTOR) {
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if (svm->vcpu.arch.exception.nested_apf)
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vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token;
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else if (svm->vcpu.arch.exception.has_payload)
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vmcb->control.exit_info_2 = svm->vcpu.arch.exception.payload;
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if (ex->vector == PF_VECTOR) {
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if (ex->nested_apf)
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vmcb->control.exit_info_2 = vcpu->arch.apf.nested_apf_token;
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else if (ex->has_payload)
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vmcb->control.exit_info_2 = ex->payload;
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else
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vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
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} else if (nr == DB_VECTOR) {
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vmcb->control.exit_info_2 = vcpu->arch.cr2;
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} else if (ex->vector == DB_VECTOR) {
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/* See inject_pending_event. */
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kvm_deliver_exception_payload(&svm->vcpu);
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if (svm->vcpu.arch.dr7 & DR7_GD) {
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svm->vcpu.arch.dr7 &= ~DR7_GD;
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kvm_update_dr7(&svm->vcpu);
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kvm_deliver_exception_payload(vcpu, ex);
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if (vcpu->arch.dr7 & DR7_GD) {
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vcpu->arch.dr7 &= ~DR7_GD;
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kvm_update_dr7(vcpu);
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}
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} else
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WARN_ON(svm->vcpu.arch.exception.has_payload);
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} else {
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WARN_ON(ex->has_payload);
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}
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nested_svm_vmexit(svm);
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}
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@ -1383,7 +1386,7 @@ static int svm_check_nested_events(struct kvm_vcpu *vcpu)
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return -EBUSY;
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if (!nested_exit_on_exception(svm))
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return 0;
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nested_svm_inject_exception_vmexit(svm);
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nested_svm_inject_exception_vmexit(vcpu);
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return 0;
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}
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@ -463,22 +463,20 @@ static int svm_update_soft_interrupt_rip(struct kvm_vcpu *vcpu)
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static void svm_inject_exception(struct kvm_vcpu *vcpu)
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{
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struct kvm_queued_exception *ex = &vcpu->arch.exception;
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struct vcpu_svm *svm = to_svm(vcpu);
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unsigned nr = vcpu->arch.exception.nr;
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bool has_error_code = vcpu->arch.exception.has_error_code;
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u32 error_code = vcpu->arch.exception.error_code;
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kvm_deliver_exception_payload(vcpu);
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kvm_deliver_exception_payload(vcpu, ex);
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if (kvm_exception_is_soft(nr) &&
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if (kvm_exception_is_soft(ex->vector) &&
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svm_update_soft_interrupt_rip(vcpu))
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return;
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svm->vmcb->control.event_inj = nr
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svm->vmcb->control.event_inj = ex->vector
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| SVM_EVTINJ_VALID
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| (has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
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| (ex->has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
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| SVM_EVTINJ_TYPE_EXEPT;
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svm->vmcb->control.event_inj_err = error_code;
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svm->vmcb->control.event_inj_err = ex->error_code;
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}
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static void svm_init_erratum_383(void)
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@ -446,29 +446,27 @@ static bool nested_vmx_is_page_fault_vmexit(struct vmcs12 *vmcs12,
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*/
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static int nested_vmx_check_exception(struct kvm_vcpu *vcpu, unsigned long *exit_qual)
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{
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struct kvm_queued_exception *ex = &vcpu->arch.exception;
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struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
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unsigned int nr = vcpu->arch.exception.nr;
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bool has_payload = vcpu->arch.exception.has_payload;
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unsigned long payload = vcpu->arch.exception.payload;
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if (nr == PF_VECTOR) {
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if (vcpu->arch.exception.nested_apf) {
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if (ex->vector == PF_VECTOR) {
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if (ex->nested_apf) {
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*exit_qual = vcpu->arch.apf.nested_apf_token;
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return 1;
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}
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if (nested_vmx_is_page_fault_vmexit(vmcs12,
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vcpu->arch.exception.error_code)) {
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*exit_qual = has_payload ? payload : vcpu->arch.cr2;
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if (nested_vmx_is_page_fault_vmexit(vmcs12, ex->error_code)) {
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*exit_qual = ex->has_payload ? ex->payload : vcpu->arch.cr2;
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return 1;
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}
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} else if (vmcs12->exception_bitmap & (1u << nr)) {
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if (nr == DB_VECTOR) {
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if (!has_payload) {
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payload = vcpu->arch.dr6;
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payload &= ~DR6_BT;
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payload ^= DR6_ACTIVE_LOW;
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} else if (vmcs12->exception_bitmap & (1u << ex->vector)) {
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if (ex->vector == DB_VECTOR) {
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if (ex->has_payload) {
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*exit_qual = ex->payload;
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} else {
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*exit_qual = vcpu->arch.dr6;
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*exit_qual &= ~DR6_BT;
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*exit_qual ^= DR6_ACTIVE_LOW;
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}
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*exit_qual = payload;
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} else
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*exit_qual = 0;
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return 1;
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@ -3764,7 +3762,7 @@ static void vmcs12_save_pending_event(struct kvm_vcpu *vcpu,
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is_double_fault(exit_intr_info))) {
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vmcs12->idt_vectoring_info_field = 0;
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} else if (vcpu->arch.exception.injected) {
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nr = vcpu->arch.exception.nr;
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nr = vcpu->arch.exception.vector;
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idt_vectoring = nr | VECTORING_INFO_VALID_MASK;
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if (kvm_exception_is_soft(nr)) {
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@ -3868,11 +3866,11 @@ mmio_needed:
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static void nested_vmx_inject_exception_vmexit(struct kvm_vcpu *vcpu,
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unsigned long exit_qual)
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{
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struct kvm_queued_exception *ex = &vcpu->arch.exception;
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u32 intr_info = ex->vector | INTR_INFO_VALID_MASK;
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struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
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unsigned int nr = vcpu->arch.exception.nr;
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u32 intr_info = nr | INTR_INFO_VALID_MASK;
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if (vcpu->arch.exception.has_error_code) {
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if (ex->has_error_code) {
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/*
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* Intel CPUs do not generate error codes with bits 31:16 set,
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* and more importantly VMX disallows setting bits 31:16 in the
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@ -3882,11 +3880,11 @@ static void nested_vmx_inject_exception_vmexit(struct kvm_vcpu *vcpu,
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* generate "full" 32-bit error codes, so KVM allows userspace
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* to inject exception error codes with bits 31:16 set.
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*/
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vmcs12->vm_exit_intr_error_code = (u16)vcpu->arch.exception.error_code;
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vmcs12->vm_exit_intr_error_code = (u16)ex->error_code;
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intr_info |= INTR_INFO_DELIVER_CODE_MASK;
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}
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if (kvm_exception_is_soft(nr))
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if (kvm_exception_is_soft(ex->vector))
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intr_info |= INTR_TYPE_SOFT_EXCEPTION;
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else
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intr_info |= INTR_TYPE_HARD_EXCEPTION;
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@ -3917,7 +3915,7 @@ static void nested_vmx_inject_exception_vmexit(struct kvm_vcpu *vcpu,
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static inline unsigned long vmx_get_pending_dbg_trap(struct kvm_vcpu *vcpu)
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{
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if (!vcpu->arch.exception.pending ||
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vcpu->arch.exception.nr != DB_VECTOR)
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vcpu->arch.exception.vector != DB_VECTOR)
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return 0;
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/* General Detect #DBs are always fault-like. */
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@ -1659,7 +1659,7 @@ static void vmx_update_emulated_instruction(struct kvm_vcpu *vcpu)
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*/
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if (nested_cpu_has_mtf(vmcs12) &&
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(!vcpu->arch.exception.pending ||
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vcpu->arch.exception.nr == DB_VECTOR))
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vcpu->arch.exception.vector == DB_VECTOR))
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vmx->nested.mtf_pending = true;
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else
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vmx->nested.mtf_pending = false;
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@ -1686,15 +1686,13 @@ static void vmx_clear_hlt(struct kvm_vcpu *vcpu)
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static void vmx_inject_exception(struct kvm_vcpu *vcpu)
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{
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struct kvm_queued_exception *ex = &vcpu->arch.exception;
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u32 intr_info = ex->vector | INTR_INFO_VALID_MASK;
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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unsigned nr = vcpu->arch.exception.nr;
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bool has_error_code = vcpu->arch.exception.has_error_code;
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u32 error_code = vcpu->arch.exception.error_code;
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u32 intr_info = nr | INTR_INFO_VALID_MASK;
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kvm_deliver_exception_payload(vcpu);
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kvm_deliver_exception_payload(vcpu, ex);
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if (has_error_code) {
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if (ex->has_error_code) {
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/*
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* Despite the error code being architecturally defined as 32
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* bits, and the VMCS field being 32 bits, Intel CPUs and thus
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@ -1705,21 +1703,21 @@ static void vmx_inject_exception(struct kvm_vcpu *vcpu)
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* the upper bits to avoid VM-Fail, losing information that
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* does't really exist is preferable to killing the VM.
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*/
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vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)error_code);
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vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)ex->error_code);
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intr_info |= INTR_INFO_DELIVER_CODE_MASK;
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}
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if (vmx->rmode.vm86_active) {
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int inc_eip = 0;
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if (kvm_exception_is_soft(nr))
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if (kvm_exception_is_soft(ex->vector))
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inc_eip = vcpu->arch.event_exit_inst_len;
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kvm_inject_realmode_interrupt(vcpu, nr, inc_eip);
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kvm_inject_realmode_interrupt(vcpu, ex->vector, inc_eip);
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return;
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}
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WARN_ON_ONCE(vmx->emulation_required);
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if (kvm_exception_is_soft(nr)) {
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if (kvm_exception_is_soft(ex->vector)) {
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vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
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vmx->vcpu.arch.event_exit_inst_len);
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intr_info |= INTR_TYPE_SOFT_EXCEPTION;
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@ -561,16 +561,13 @@ static int exception_type(int vector)
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return EXCPT_FAULT;
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}
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void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
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void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu,
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struct kvm_queued_exception *ex)
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{
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unsigned nr = vcpu->arch.exception.nr;
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bool has_payload = vcpu->arch.exception.has_payload;
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unsigned long payload = vcpu->arch.exception.payload;
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if (!has_payload)
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if (!ex->has_payload)
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return;
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switch (nr) {
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switch (ex->vector) {
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case DB_VECTOR:
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/*
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* "Certain debug exceptions may clear bit 0-3. The
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@ -595,8 +592,8 @@ void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
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* So they need to be flipped for DR6.
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*/
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vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
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vcpu->arch.dr6 |= payload;
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vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
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vcpu->arch.dr6 |= ex->payload;
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vcpu->arch.dr6 ^= ex->payload & DR6_ACTIVE_LOW;
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/*
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* The #DB payload is defined as compatible with the 'pending
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@ -607,12 +604,12 @@ void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
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vcpu->arch.dr6 &= ~BIT(12);
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break;
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case PF_VECTOR:
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vcpu->arch.cr2 = payload;
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vcpu->arch.cr2 = ex->payload;
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break;
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}
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vcpu->arch.exception.has_payload = false;
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vcpu->arch.exception.payload = 0;
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ex->has_payload = false;
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ex->payload = 0;
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}
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EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
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@ -651,17 +648,18 @@ static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
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vcpu->arch.exception.injected = false;
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}
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vcpu->arch.exception.has_error_code = has_error;
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vcpu->arch.exception.nr = nr;
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vcpu->arch.exception.vector = nr;
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vcpu->arch.exception.error_code = error_code;
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vcpu->arch.exception.has_payload = has_payload;
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vcpu->arch.exception.payload = payload;
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if (!is_guest_mode(vcpu))
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kvm_deliver_exception_payload(vcpu);
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kvm_deliver_exception_payload(vcpu,
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&vcpu->arch.exception);
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return;
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}
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/* to check exception */
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prev_nr = vcpu->arch.exception.nr;
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prev_nr = vcpu->arch.exception.vector;
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if (prev_nr == DF_VECTOR) {
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/* triple fault -> shutdown */
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kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
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@ -679,7 +677,7 @@ static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
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vcpu->arch.exception.pending = true;
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vcpu->arch.exception.injected = false;
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vcpu->arch.exception.has_error_code = true;
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vcpu->arch.exception.nr = DF_VECTOR;
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vcpu->arch.exception.vector = DF_VECTOR;
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vcpu->arch.exception.error_code = 0;
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vcpu->arch.exception.has_payload = false;
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vcpu->arch.exception.payload = 0;
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@ -5015,25 +5013,24 @@ static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
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static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
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struct kvm_vcpu_events *events)
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{
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struct kvm_queued_exception *ex = &vcpu->arch.exception;
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process_nmi(vcpu);
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if (kvm_check_request(KVM_REQ_SMI, vcpu))
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process_smi(vcpu);
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/*
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* In guest mode, payload delivery should be deferred,
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* so that the L1 hypervisor can intercept #PF before
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* CR2 is modified (or intercept #DB before DR6 is
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* modified under nVMX). Unless the per-VM capability,
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* KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
|
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* an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
|
||||
* opportunistically defer the exception payload, deliver it if the
|
||||
* capability hasn't been requested before processing a
|
||||
* KVM_GET_VCPU_EVENTS.
|
||||
* In guest mode, payload delivery should be deferred if the exception
|
||||
* will be intercepted by L1, e.g. KVM should not modifying CR2 if L1
|
||||
* intercepts #PF, ditto for DR6 and #DBs. If the per-VM capability,
|
||||
* KVM_CAP_EXCEPTION_PAYLOAD, is not set, userspace may or may not
|
||||
* propagate the payload and so it cannot be safely deferred. Deliver
|
||||
* the payload if the capability hasn't been requested.
|
||||
*/
|
||||
if (!vcpu->kvm->arch.exception_payload_enabled &&
|
||||
vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
|
||||
kvm_deliver_exception_payload(vcpu);
|
||||
ex->pending && ex->has_payload)
|
||||
kvm_deliver_exception_payload(vcpu, ex);
|
||||
|
||||
/*
|
||||
* The API doesn't provide the instruction length for software
|
||||
@ -5041,26 +5038,25 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
|
||||
* isn't advanced, we should expect to encounter the exception
|
||||
* again.
|
||||
*/
|
||||
if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
|
||||
if (kvm_exception_is_soft(ex->vector)) {
|
||||
events->exception.injected = 0;
|
||||
events->exception.pending = 0;
|
||||
} else {
|
||||
events->exception.injected = vcpu->arch.exception.injected;
|
||||
events->exception.pending = vcpu->arch.exception.pending;
|
||||
events->exception.injected = ex->injected;
|
||||
events->exception.pending = ex->pending;
|
||||
/*
|
||||
* For ABI compatibility, deliberately conflate
|
||||
* pending and injected exceptions when
|
||||
* KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
|
||||
*/
|
||||
if (!vcpu->kvm->arch.exception_payload_enabled)
|
||||
events->exception.injected |=
|
||||
vcpu->arch.exception.pending;
|
||||
events->exception.injected |= ex->pending;
|
||||
}
|
||||
events->exception.nr = vcpu->arch.exception.nr;
|
||||
events->exception.has_error_code = vcpu->arch.exception.has_error_code;
|
||||
events->exception.error_code = vcpu->arch.exception.error_code;
|
||||
events->exception_has_payload = vcpu->arch.exception.has_payload;
|
||||
events->exception_payload = vcpu->arch.exception.payload;
|
||||
events->exception.nr = ex->vector;
|
||||
events->exception.has_error_code = ex->has_error_code;
|
||||
events->exception.error_code = ex->error_code;
|
||||
events->exception_has_payload = ex->has_payload;
|
||||
events->exception_payload = ex->payload;
|
||||
|
||||
events->interrupt.injected =
|
||||
vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
|
||||
@ -5132,7 +5128,7 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
|
||||
process_nmi(vcpu);
|
||||
vcpu->arch.exception.injected = events->exception.injected;
|
||||
vcpu->arch.exception.pending = events->exception.pending;
|
||||
vcpu->arch.exception.nr = events->exception.nr;
|
||||
vcpu->arch.exception.vector = events->exception.nr;
|
||||
vcpu->arch.exception.has_error_code = events->exception.has_error_code;
|
||||
vcpu->arch.exception.error_code = events->exception.error_code;
|
||||
vcpu->arch.exception.has_payload = events->exception_has_payload;
|
||||
@ -9718,7 +9714,7 @@ int kvm_check_nested_events(struct kvm_vcpu *vcpu)
|
||||
|
||||
static void kvm_inject_exception(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
trace_kvm_inj_exception(vcpu->arch.exception.nr,
|
||||
trace_kvm_inj_exception(vcpu->arch.exception.vector,
|
||||
vcpu->arch.exception.has_error_code,
|
||||
vcpu->arch.exception.error_code,
|
||||
vcpu->arch.exception.injected);
|
||||
@ -9790,12 +9786,12 @@ static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
|
||||
* describe the behavior of General Detect #DBs, which are
|
||||
* fault-like. They do _not_ set RF, a la code breakpoints.
|
||||
*/
|
||||
if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
|
||||
if (exception_type(vcpu->arch.exception.vector) == EXCPT_FAULT)
|
||||
__kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
|
||||
X86_EFLAGS_RF);
|
||||
|
||||
if (vcpu->arch.exception.nr == DB_VECTOR) {
|
||||
kvm_deliver_exception_payload(vcpu);
|
||||
if (vcpu->arch.exception.vector == DB_VECTOR) {
|
||||
kvm_deliver_exception_payload(vcpu, &vcpu->arch.exception);
|
||||
if (vcpu->arch.dr7 & DR7_GD) {
|
||||
vcpu->arch.dr7 &= ~DR7_GD;
|
||||
kvm_update_dr7(vcpu);
|
||||
|
||||
@ -286,7 +286,8 @@ int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
|
||||
|
||||
int handle_ud(struct kvm_vcpu *vcpu);
|
||||
|
||||
void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
|
||||
void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu,
|
||||
struct kvm_queued_exception *ex);
|
||||
|
||||
void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
|
||||
u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user