iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)

Browse Source 
Add a workaround to fix BS-BS jitter issues on MST links, aligning
DPT/DPTP MTPs.

Bspec: 50050, 55424

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-4-imre.deak@intel.com
This commit is contained in:
Imre Deak 2024-01-29 19:55:30 +02:00
parent 1af52d0555
commit d4e745ba81
2 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/i915/display/intel_dp_mst.c
View File

@ -1141,6 +1141,9 @@ static void enable_bs_jitter_was(const struct intel_crtc_state *crtc_state)
set |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
else if (crtc_state->fec_enable)
clear |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))
set |= DP_MST_DPT_DPTP_ALIGN_WA(crtc_state->cpu_transcoder);
}
if (!clear && !set)

1
drivers/gpu/drm/i915/i915_reg.h
View File

@ -4565,6 +4565,7 @@
#define GLK_CL0_PWR_DOWN REG_BIT(10)
#define CHICKEN_MISC_3 _MMIO(0x42088)
#define DP_MST_DPT_DPTP_ALIGN_WA(trans) REG_BIT(9 + (trans) - TRANSCODER_A)
#define DP_MST_SHORT_HBLANK_WA(trans) REG_BIT(5 + (trans) - TRANSCODER_A)
#define DP_MST_FEC_BS_JITTER_WA(trans) REG_BIT(0 + (trans) - TRANSCODER_A)