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spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion

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If one leaves the CQSPI_REG_CMDCTRL in an unclean state this may cause
issues in future command reads. This issue came to light when some flash
reads in STIG mode were coming back dirty.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230125081023.1573712-2-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Dhruva Gole 2023-01-25 13:40:20 +05:30 committed by Mark Brown
parent 937ca916bf
commit d4f43a2d05
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GPG Key ID: 24D68B725D5487D0
1 changed files with 9 additions and 1 deletions
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10
drivers/spi/spi-cadence-quadspi.c
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@ -549,6 +549,9 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
memcpy(rxbuf, &reg, read_len);
}
/* Reset CMD_CTRL Reg once command read completes */
writel(0, reg_base + CQSPI_REG_CMDCTRL);
return 0;
}
@ -613,7 +616,12 @@ static int cqspi_command_write(struct cqspi_flash_pdata *f_pdata,
}
}
return cqspi_exec_flash_cmd(cqspi, reg);
ret = cqspi_exec_flash_cmd(cqspi, reg);
/* Reset CMD_CTRL Reg once command write completes */
writel(0, reg_base + CQSPI_REG_CMDCTRL);
return ret;
}
static int cqspi_read_setup(struct cqspi_flash_pdata *f_pdata,