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drm/amd/pm: correct SMU OverridePcieParameters related settings

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Correct the hw initialization sequence.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2022-04-06 17:47:20 -04:00 committed by Alex Deucher
parent 9b5f9891c4
commit d51e577c7d
1 changed files with 11 additions and 11 deletions
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22
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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@ -1218,6 +1218,17 @@ static int smu_smc_hw_setup(struct smu_context *smu)
if (!smu_is_dpm_running(smu)) if (!smu_is_dpm_running(smu))
dev_info(adev->dev, "dpm has been disabled\n"); dev_info(adev->dev, "dpm has been disabled\n");
/*
* Set initialized values (get from vbios) to dpm tables context such as
* gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
* type of clks.
*/
ret = smu_set_default_dpm_table(smu);
if (ret) {
dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
return ret;
}
if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4) if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4)
pcie_gen = 3; pcie_gen = 3;
else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
@ -1261,17 +1272,6 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret; return ret;
} }
/*
* Set initialized values (get from vbios) to dpm tables context such as
* gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
* type of clks.
*/
ret = smu_set_default_dpm_table(smu);
if (ret) {
dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
return ret;
}
ret = smu_notify_display_change(smu); ret = smu_notify_display_change(smu);
if (ret) { if (ret) {
dev_err(adev->dev, "Failed to notify display change!\n"); dev_err(adev->dev, "Failed to notify display change!\n");