ASoC: rsnd: fixup ADG register mask
BRGCKR should use 0x80770000, instead of 0x80FF0000. R-Car Gen2 xxx_TIMSEL should use 0x0F1F, R-Car Gen3 xxx_TIMSEL should use 0x1F1F. Here, Gen3 doesn't support AVD, thus, both case can use 0x0F1F. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
33f801366b
commit
d5aa24825d
@ -222,7 +222,7 @@ int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *cmd_mod,
|
||||
NULL, &val, NULL);
|
||||
|
||||
val = val << shift;
|
||||
mask = 0xffff << shift;
|
||||
mask = 0x0f1f << shift;
|
||||
|
||||
rsnd_mod_bset(adg_mod, CMDOUT_TIMSEL, mask, val);
|
||||
|
||||
@ -250,7 +250,7 @@ int rsnd_adg_set_src_timesel_gen2(struct rsnd_mod *src_mod,
|
||||
|
||||
in = in << shift;
|
||||
out = out << shift;
|
||||
mask = 0xffff << shift;
|
||||
mask = 0x0f1f << shift;
|
||||
|
||||
switch (id / 2) {
|
||||
case 0:
|
||||
@ -380,7 +380,7 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *ssi_mod, unsigned int rate)
|
||||
ckr = 0x80000000;
|
||||
}
|
||||
|
||||
rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, adg->ckr | ckr);
|
||||
rsnd_mod_bset(adg_mod, BRGCKR, 0x80770000, adg->ckr | ckr);
|
||||
rsnd_mod_write(adg_mod, BRRA, adg->rbga);
|
||||
rsnd_mod_write(adg_mod, BRRB, adg->rbgb);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user