Merge 4.20-rc5 into staging-next
We need the staging fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
commit
d5d12ce229
1
.mailmap
1
.mailmap
@ -159,6 +159,7 @@ Peter Oruba <peter@oruba.de>
|
||||
Peter Oruba <peter.oruba@amd.com>
|
||||
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
|
||||
Praveen BP <praveenbp@ti.com>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
|
||||
|
8
CREDITS
8
CREDITS
@ -2138,6 +2138,10 @@ E: paul@laufernet.com
|
||||
D: Soundblaster driver fixes, ISAPnP quirk
|
||||
S: California, USA
|
||||
|
||||
N: Jarkko Lavinen
|
||||
E: jarkko.lavinen@nokia.com
|
||||
D: OMAP MMC support
|
||||
|
||||
N: Jonathan Layes
|
||||
D: ARPD support
|
||||
|
||||
@ -2200,6 +2204,10 @@ S: Post Office Box 371
|
||||
S: North Little Rock, Arkansas 72115
|
||||
S: USA
|
||||
|
||||
N: Christopher Li
|
||||
E: sparse@chrisli.org
|
||||
D: Sparse maintainer 2009 - 2018
|
||||
|
||||
N: Stephan Linz
|
||||
E: linz@mazet.de
|
||||
E: Stephan.Linz@gmx.de
|
||||
|
@ -37,8 +37,8 @@ Description:
|
||||
0-| / \/ \/
|
||||
+---0----1----2----3----4----5----6------------> time (s)
|
||||
|
||||
2. To make the LED go instantly from one brigntess value to another,
|
||||
we should use use zero-time lengths (the brightness must be same as
|
||||
2. To make the LED go instantly from one brightness value to another,
|
||||
we should use zero-time lengths (the brightness must be same as
|
||||
the previous tuple's). So the format should be:
|
||||
"brightness_1 duration_1 brightness_1 0 brightness_2 duration_2
|
||||
brightness_2 0 ...". For example:
|
||||
|
@ -856,7 +856,8 @@
|
||||
causing system reset or hang due to sending
|
||||
INIT from AP to BSP.
|
||||
|
||||
disable_counter_freezing [HW]
|
||||
perf_v4_pmi= [X86,INTEL]
|
||||
Format: <bool>
|
||||
Disable Intel PMU counter freezing feature.
|
||||
The feature only exists starting from
|
||||
Arch Perfmon v4 (Skylake and newer).
|
||||
@ -3504,6 +3505,10 @@
|
||||
before loading.
|
||||
See Documentation/blockdev/ramdisk.txt.
|
||||
|
||||
psi= [KNL] Enable or disable pressure stall information
|
||||
tracking.
|
||||
Format: <bool>
|
||||
|
||||
psmouse.proto= [HW,MOUSE] Highest PS2 mouse protocol extension to
|
||||
probe for; one of (bare|imps|exps|lifebook|any).
|
||||
psmouse.rate= [HW,MOUSE] Set desired mouse report rate, in reports
|
||||
@ -4194,9 +4199,13 @@
|
||||
|
||||
spectre_v2= [X86] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability.
|
||||
The default operation protects the kernel from
|
||||
user space attacks.
|
||||
|
||||
on - unconditionally enable
|
||||
off - unconditionally disable
|
||||
on - unconditionally enable, implies
|
||||
spectre_v2_user=on
|
||||
off - unconditionally disable, implies
|
||||
spectre_v2_user=off
|
||||
auto - kernel detects whether your CPU model is
|
||||
vulnerable
|
||||
|
||||
@ -4206,6 +4215,12 @@
|
||||
CONFIG_RETPOLINE configuration option, and the
|
||||
compiler with which the kernel was built.
|
||||
|
||||
Selecting 'on' will also enable the mitigation
|
||||
against user space to user space task attacks.
|
||||
|
||||
Selecting 'off' will disable both the kernel and
|
||||
the user space protections.
|
||||
|
||||
Specific mitigations can also be selected manually:
|
||||
|
||||
retpoline - replace indirect branches
|
||||
@ -4215,6 +4230,48 @@
|
||||
Not specifying this option is equivalent to
|
||||
spectre_v2=auto.
|
||||
|
||||
spectre_v2_user=
|
||||
[X86] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability between
|
||||
user space tasks
|
||||
|
||||
on - Unconditionally enable mitigations. Is
|
||||
enforced by spectre_v2=on
|
||||
|
||||
off - Unconditionally disable mitigations. Is
|
||||
enforced by spectre_v2=off
|
||||
|
||||
prctl - Indirect branch speculation is enabled,
|
||||
but mitigation can be enabled via prctl
|
||||
per thread. The mitigation control state
|
||||
is inherited on fork.
|
||||
|
||||
prctl,ibpb
|
||||
- Like "prctl" above, but only STIBP is
|
||||
controlled per thread. IBPB is issued
|
||||
always when switching between different user
|
||||
space processes.
|
||||
|
||||
seccomp
|
||||
- Same as "prctl" above, but all seccomp
|
||||
threads will enable the mitigation unless
|
||||
they explicitly opt out.
|
||||
|
||||
seccomp,ibpb
|
||||
- Like "seccomp" above, but only STIBP is
|
||||
controlled per thread. IBPB is issued
|
||||
always when switching between different
|
||||
user space processes.
|
||||
|
||||
auto - Kernel selects the mitigation depending on
|
||||
the available CPU features and vulnerability.
|
||||
|
||||
Default mitigation:
|
||||
If CONFIG_SECCOMP=y then "seccomp", otherwise "prctl"
|
||||
|
||||
Not specifying this option is equivalent to
|
||||
spectre_v2_user=auto.
|
||||
|
||||
spec_store_bypass_disable=
|
||||
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
|
||||
(Speculative Store Bypass vulnerability)
|
||||
@ -4713,6 +4770,8 @@
|
||||
prevent spurious wakeup);
|
||||
n = USB_QUIRK_DELAY_CTRL_MSG (Device needs a
|
||||
pause after every control message);
|
||||
o = USB_QUIRK_HUB_SLOW_RESET (Hub needs extra
|
||||
delay after resetting its port);
|
||||
Example: quirks=0781:5580:bk,0a5c:5834:gij
|
||||
|
||||
usbhid.mousepoll=
|
||||
|
@ -150,7 +150,7 @@ data structures necessary to handle the given policy and, possibly, to add
|
||||
a governor ``sysfs`` interface to it. Next, the governor is started by
|
||||
invoking its ``->start()`` callback.
|
||||
|
||||
That callback it expected to register per-CPU utilization update callbacks for
|
||||
That callback is expected to register per-CPU utilization update callbacks for
|
||||
all of the online CPUs belonging to the given policy with the CPU scheduler.
|
||||
The utilization update callbacks will be invoked by the CPU scheduler on
|
||||
important events, like task enqueue and dequeue, on every iteration of the
|
||||
|
@ -32,16 +32,17 @@ Disclosure and embargoed information
|
||||
The security list is not a disclosure channel. For that, see Coordination
|
||||
below.
|
||||
|
||||
Once a robust fix has been developed, our preference is to release the
|
||||
fix in a timely fashion, treating it no differently than any of the other
|
||||
thousands of changes and fixes the Linux kernel project releases every
|
||||
month.
|
||||
Once a robust fix has been developed, the release process starts. Fixes
|
||||
for publicly known bugs are released immediately.
|
||||
|
||||
However, at the request of the reporter, we will postpone releasing the
|
||||
fix for up to 5 business days after the date of the report or after the
|
||||
embargo has lifted; whichever comes first. The only exception to that
|
||||
rule is if the bug is publicly known, in which case the preference is to
|
||||
release the fix as soon as it's available.
|
||||
Although our preference is to release fixes for publicly undisclosed bugs
|
||||
as soon as they become available, this may be postponed at the request of
|
||||
the reporter or an affected party for up to 7 calendar days from the start
|
||||
of the release process, with an exceptional extension to 14 calendar days
|
||||
if it is agreed that the criticality of the bug requires more time. The
|
||||
only valid reason for deferring the publication of a fix is to accommodate
|
||||
the logistics of QA and large scale rollouts which require release
|
||||
coordination.
|
||||
|
||||
Whilst embargoed information may be shared with trusted individuals in
|
||||
order to develop a fix, such information will not be published alongside
|
||||
|
@ -57,6 +57,7 @@ stable kernels.
|
||||
| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
|
||||
| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
|
||||
| ARM | Cortex-A76 | #1188873 | ARM64_ERRATUM_1188873 |
|
||||
| ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 |
|
||||
| ARM | MMU-500 | #841119,#826419 | N/A |
|
||||
| | | | |
|
||||
| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
|
||||
|
@ -74,7 +74,8 @@ using :c:func:`xa_load`. xa_store will overwrite any entry with the
|
||||
new entry and return the previous entry stored at that index. You can
|
||||
use :c:func:`xa_erase` instead of calling :c:func:`xa_store` with a
|
||||
``NULL`` entry. There is no difference between an entry that has never
|
||||
been stored to and one that has most recently had ``NULL`` stored to it.
|
||||
been stored to, one that has been erased and one that has most recently
|
||||
had ``NULL`` stored to it.
|
||||
|
||||
You can conditionally replace an entry at an index by using
|
||||
:c:func:`xa_cmpxchg`. Like :c:func:`cmpxchg`, it will only succeed if
|
||||
@ -105,23 +106,44 @@ may result in the entry being marked at some, but not all of the other
|
||||
indices. Storing into one index may result in the entry retrieved by
|
||||
some, but not all of the other indices changing.
|
||||
|
||||
Sometimes you need to ensure that a subsequent call to :c:func:`xa_store`
|
||||
will not need to allocate memory. The :c:func:`xa_reserve` function
|
||||
will store a reserved entry at the indicated index. Users of the normal
|
||||
API will see this entry as containing ``NULL``. If you do not need to
|
||||
use the reserved entry, you can call :c:func:`xa_release` to remove the
|
||||
unused entry. If another user has stored to the entry in the meantime,
|
||||
:c:func:`xa_release` will do nothing; if instead you want the entry to
|
||||
become ``NULL``, you should use :c:func:`xa_erase`.
|
||||
|
||||
If all entries in the array are ``NULL``, the :c:func:`xa_empty` function
|
||||
will return ``true``.
|
||||
|
||||
Finally, you can remove all entries from an XArray by calling
|
||||
:c:func:`xa_destroy`. If the XArray entries are pointers, you may wish
|
||||
to free the entries first. You can do this by iterating over all present
|
||||
entries in the XArray using the :c:func:`xa_for_each` iterator.
|
||||
|
||||
ID assignment
|
||||
-------------
|
||||
Allocating XArrays
|
||||
------------------
|
||||
|
||||
If you use :c:func:`DEFINE_XARRAY_ALLOC` to define the XArray, or
|
||||
initialise it by passing ``XA_FLAGS_ALLOC`` to :c:func:`xa_init_flags`,
|
||||
the XArray changes to track whether entries are in use or not.
|
||||
|
||||
You can call :c:func:`xa_alloc` to store the entry at any unused index
|
||||
in the XArray. If you need to modify the array from interrupt context,
|
||||
you can use :c:func:`xa_alloc_bh` or :c:func:`xa_alloc_irq` to disable
|
||||
interrupts while allocating the ID. Unlike :c:func:`xa_store`, allocating
|
||||
a ``NULL`` pointer does not delete an entry. Instead it reserves an
|
||||
entry like :c:func:`xa_reserve` and you can release it using either
|
||||
:c:func:`xa_erase` or :c:func:`xa_release`. To use ID assignment, the
|
||||
XArray must be defined with :c:func:`DEFINE_XARRAY_ALLOC`, or initialised
|
||||
by passing ``XA_FLAGS_ALLOC`` to :c:func:`xa_init_flags`,
|
||||
interrupts while allocating the ID.
|
||||
|
||||
Using :c:func:`xa_store`, :c:func:`xa_cmpxchg` or :c:func:`xa_insert`
|
||||
will mark the entry as being allocated. Unlike a normal XArray, storing
|
||||
``NULL`` will mark the entry as being in use, like :c:func:`xa_reserve`.
|
||||
To free an entry, use :c:func:`xa_erase` (or :c:func:`xa_release` if
|
||||
you only want to free the entry if it's ``NULL``).
|
||||
|
||||
You cannot use ``XA_MARK_0`` with an allocating XArray as this mark
|
||||
is used to track whether an entry is free or not. The other marks are
|
||||
available for your use.
|
||||
|
||||
Memory allocation
|
||||
-----------------
|
||||
@ -158,6 +180,8 @@ Takes RCU read lock:
|
||||
|
||||
Takes xa_lock internally:
|
||||
* :c:func:`xa_store`
|
||||
* :c:func:`xa_store_bh`
|
||||
* :c:func:`xa_store_irq`
|
||||
* :c:func:`xa_insert`
|
||||
* :c:func:`xa_erase`
|
||||
* :c:func:`xa_erase_bh`
|
||||
@ -167,6 +191,9 @@ Takes xa_lock internally:
|
||||
* :c:func:`xa_alloc`
|
||||
* :c:func:`xa_alloc_bh`
|
||||
* :c:func:`xa_alloc_irq`
|
||||
* :c:func:`xa_reserve`
|
||||
* :c:func:`xa_reserve_bh`
|
||||
* :c:func:`xa_reserve_irq`
|
||||
* :c:func:`xa_destroy`
|
||||
* :c:func:`xa_set_mark`
|
||||
* :c:func:`xa_clear_mark`
|
||||
@ -177,6 +204,7 @@ Assumes xa_lock held on entry:
|
||||
* :c:func:`__xa_erase`
|
||||
* :c:func:`__xa_cmpxchg`
|
||||
* :c:func:`__xa_alloc`
|
||||
* :c:func:`__xa_reserve`
|
||||
* :c:func:`__xa_set_mark`
|
||||
* :c:func:`__xa_clear_mark`
|
||||
|
||||
@ -234,7 +262,8 @@ Sharing the XArray with interrupt context is also possible, either
|
||||
using :c:func:`xa_lock_irqsave` in both the interrupt handler and process
|
||||
context, or :c:func:`xa_lock_irq` in process context and :c:func:`xa_lock`
|
||||
in the interrupt handler. Some of the more common patterns have helper
|
||||
functions such as :c:func:`xa_erase_bh` and :c:func:`xa_erase_irq`.
|
||||
functions such as :c:func:`xa_store_bh`, :c:func:`xa_store_irq`,
|
||||
:c:func:`xa_erase_bh` and :c:func:`xa_erase_irq`.
|
||||
|
||||
Sometimes you need to protect access to the XArray with a mutex because
|
||||
that lock sits above another mutex in the locking hierarchy. That does
|
||||
@ -322,7 +351,8 @@ to :c:func:`xas_retry`, and retry the operation if it returns ``true``.
|
||||
- :c:func:`xa_is_zero`
|
||||
- Zero entries appear as ``NULL`` through the Normal API, but occupy
|
||||
an entry in the XArray which can be used to reserve the index for
|
||||
future use.
|
||||
future use. This is used by allocating XArrays for allocated entries
|
||||
which are ``NULL``.
|
||||
|
||||
Other internal entries may be added in the future. As far as possible, they
|
||||
will be handled by :c:func:`xas_retry`.
|
||||
|
@ -86,9 +86,11 @@ transitions.
|
||||
This will give a fine grained information about all the CPU frequency
|
||||
transitions. The cat output here is a two dimensional matrix, where an entry
|
||||
<i,j> (row i, column j) represents the count of number of transitions from
|
||||
Freq_i to Freq_j. Freq_i is in descending order with increasing rows and
|
||||
Freq_j is in descending order with increasing columns. The output here also
|
||||
contains the actual freq values for each row and column for better readability.
|
||||
Freq_i to Freq_j. Freq_i rows and Freq_j columns follow the sorting order in
|
||||
which the driver has provided the frequency table initially to the cpufreq core
|
||||
and so can be sorted (ascending or descending) or unsorted. The output here
|
||||
also contains the actual freq values for each row and column for better
|
||||
readability.
|
||||
|
||||
If the transition table is bigger than PAGE_SIZE, reading this will
|
||||
return an -EFBIG error.
|
||||
|
@ -27,7 +27,7 @@ SoCs:
|
||||
compatible = "renesas,r8a77470"
|
||||
- RZ/G2M (R8A774A1)
|
||||
compatible = "renesas,r8a774a1"
|
||||
- RZ/G2E (RA8774C0)
|
||||
- RZ/G2E (R8A774C0)
|
||||
compatible = "renesas,r8a774c0"
|
||||
- R-Car M1A (R8A77781)
|
||||
compatible = "renesas,r8a7778"
|
||||
|
@ -1,65 +0,0 @@
|
||||
Generic ARM big LITTLE cpufreq driver's DT glue
|
||||
-----------------------------------------------
|
||||
|
||||
This is DT specific glue layer for generic cpufreq driver for big LITTLE
|
||||
systems.
|
||||
|
||||
Both required and optional properties listed below must be defined
|
||||
under node /cpus/cpu@x. Where x is the first cpu inside a cluster.
|
||||
|
||||
FIXME: Cpus should boot in the order specified in DT and all cpus for a cluster
|
||||
must be present contiguously. Generic DT driver will check only node 'x' for
|
||||
cpu:x.
|
||||
|
||||
Required properties:
|
||||
- operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt
|
||||
for details
|
||||
|
||||
Optional properties:
|
||||
- clock-latency: Specify the possible maximum transition latency for clock,
|
||||
in unit of nanoseconds.
|
||||
|
||||
Examples:
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
792000 1100000
|
||||
396000 950000
|
||||
198000 850000
|
||||
>;
|
||||
clock-latency = <61036>; /* two CLK32 periods */
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@100 {
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <100>;
|
||||
next-level-cache = <&L2>;
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
792000 950000
|
||||
396000 750000
|
||||
198000 450000
|
||||
>;
|
||||
clock-latency = <61036>; /* two CLK32 periods */
|
||||
};
|
||||
|
||||
cpu@101 {
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <101>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
@ -1,8 +1,12 @@
|
||||
I2C for OMAP platforms
|
||||
|
||||
Required properties :
|
||||
- compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c"
|
||||
or "ti,omap4-i2c"
|
||||
- compatible : Must be
|
||||
"ti,omap2420-i2c" for OMAP2420 SoCs
|
||||
"ti,omap2430-i2c" for OMAP2430 SoCs
|
||||
"ti,omap3-i2c" for OMAP3 SoCs
|
||||
"ti,omap4-i2c" for OMAP4+ SoCs
|
||||
"ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs
|
||||
- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
|
@ -17,7 +17,7 @@ Example:
|
||||
reg = <1>;
|
||||
clocks = <&clk32m>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <13 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
vdd-supply = <®5v0>;
|
||||
xceiver-supply = <®5v0>;
|
||||
};
|
||||
|
@ -5,6 +5,7 @@ Required properties:
|
||||
- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
|
||||
"renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
|
||||
"renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
|
||||
"renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
|
||||
"renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
|
||||
"renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
|
||||
"renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
|
||||
@ -14,26 +15,32 @@ Required properties:
|
||||
"renesas,can-r8a7794" if CAN controller is a part of R8A7794 SoC.
|
||||
"renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
|
||||
"renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC.
|
||||
"renesas,can-r8a77965" if CAN controller is a part of R8A77965 SoC.
|
||||
"renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
|
||||
"renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
|
||||
compatible device.
|
||||
"renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
|
||||
"renesas,rcar-gen3-can" for a generic R-Car Gen3 or RZ/G2
|
||||
compatible device.
|
||||
When compatible with the generic version, nodes must list the
|
||||
SoC-specific version corresponding to the platform first
|
||||
followed by the generic version.
|
||||
|
||||
- reg: physical base address and size of the R-Car CAN register map.
|
||||
- interrupts: interrupt specifier for the sole interrupt.
|
||||
- clocks: phandles and clock specifiers for 3 CAN clock inputs.
|
||||
- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
|
||||
- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2
|
||||
devices.
|
||||
phandles and clock specifiers for 3 CAN clock inputs for every other
|
||||
SoC.
|
||||
- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk".
|
||||
3 clock input name strings for every other SoC: "clkp1", "clkp2",
|
||||
"can_clk".
|
||||
- pinctrl-0: pin control group to be used for this controller.
|
||||
- pinctrl-names: must be "default".
|
||||
|
||||
Required properties for "renesas,can-r8a7795" and "renesas,can-r8a7796"
|
||||
compatible:
|
||||
In R8A7795 and R8A7796 SoCs, "clkp2" can be CANFD clock. This is a div6 clock
|
||||
and can be used by both CAN and CAN FD controller at the same time. It needs to
|
||||
be scaled to maximum frequency if any of these controllers use it. This is done
|
||||
Required properties for R8A7795, R8A7796 and R8A77965:
|
||||
For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can
|
||||
be used by both CAN and CAN FD controller at the same time. It needs to be
|
||||
scaled to maximum frequency if any of these controllers use it. This is done
|
||||
using the below properties:
|
||||
|
||||
- assigned-clocks: phandle of clkp2(CANFD) clock.
|
||||
@ -42,8 +49,9 @@ using the below properties:
|
||||
Optional properties:
|
||||
- renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
|
||||
<0x0> (default) : Peripheral clock (clkp1)
|
||||
<0x1> : Peripheral clock (clkp2)
|
||||
<0x3> : Externally input clock
|
||||
<0x1> : Peripheral clock (clkp2) (not supported by
|
||||
RZ/G2 devices)
|
||||
<0x3> : External input clock
|
||||
|
||||
Example
|
||||
-------
|
||||
|
@ -7,7 +7,7 @@ limitations.
|
||||
Current Binding
|
||||
---------------
|
||||
|
||||
Switches are true Linux devices and can be probes by any means. Once
|
||||
Switches are true Linux devices and can be probed by any means. Once
|
||||
probed, they register to the DSA framework, passing a node
|
||||
pointer. This node is expected to fulfil the following binding, and
|
||||
may contain additional properties as required by the device it is
|
||||
|
@ -40,24 +40,36 @@ Required properties:
|
||||
"ref" for 19.2 MHz ref clk,
|
||||
"com_aux" for phy common block aux clock,
|
||||
"ref_aux" for phy reference aux clock,
|
||||
|
||||
For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed.
|
||||
For "qcom,msm8996-qmp-pcie-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref".
|
||||
For "qcom,msm8996-qmp-usb3-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref".
|
||||
For "qcom,qmp-v3-usb3-phy" must contain:
|
||||
For "qcom,sdm845-qmp-usb3-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref", "com_aux".
|
||||
For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref", "com_aux".
|
||||
For "qcom,sdm845-qmp-ufs-phy" must contain:
|
||||
"ref", "ref_aux".
|
||||
|
||||
- resets: a list of phandles and reset controller specifier pairs,
|
||||
one for each entry in reset-names.
|
||||
- reset-names: "phy" for reset of phy block,
|
||||
"common" for phy common block reset,
|
||||
"cfg" for phy's ahb cfg block reset (Optional).
|
||||
For "qcom,msm8996-qmp-pcie-phy" must contain:
|
||||
"phy", "common", "cfg".
|
||||
For "qcom,msm8996-qmp-usb3-phy" must contain
|
||||
"phy", "common".
|
||||
"cfg" for phy's ahb cfg block reset.
|
||||
|
||||
For "qcom,ipq8074-qmp-pcie-phy" must contain:
|
||||
"phy", "common".
|
||||
"phy", "common".
|
||||
For "qcom,msm8996-qmp-pcie-phy" must contain:
|
||||
"phy", "common", "cfg".
|
||||
For "qcom,msm8996-qmp-usb3-phy" must contain
|
||||
"phy", "common".
|
||||
For "qcom,sdm845-qmp-usb3-phy" must contain:
|
||||
"phy", "common".
|
||||
For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
|
||||
"phy", "common".
|
||||
For "qcom,sdm845-qmp-ufs-phy": no resets are listed.
|
||||
|
||||
- vdda-phy-supply: Phandle to a regulator supply to PHY core block.
|
||||
- vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
|
||||
@ -79,9 +91,10 @@ Required properties for child node:
|
||||
|
||||
- #phy-cells: must be 0
|
||||
|
||||
Required properties child node of pcie and usb3 qmp phys:
|
||||
- clocks: a list of phandles and clock-specifier pairs,
|
||||
one for each entry in clock-names.
|
||||
- clock-names: Must contain following for pcie and usb qmp phys:
|
||||
- clock-names: Must contain following:
|
||||
"pipe<lane-number>" for pipe clock specific to each lane.
|
||||
- clock-output-names: Name of the PHY clock that will be the parent for
|
||||
the above pipe clock.
|
||||
@ -91,9 +104,11 @@ Required properties for child node:
|
||||
(or)
|
||||
"pcie20_phy1_pipe_clk"
|
||||
|
||||
Required properties for child node of PHYs with lane reset, AKA:
|
||||
"qcom,msm8996-qmp-pcie-phy"
|
||||
- resets: a list of phandles and reset controller specifier pairs,
|
||||
one for each entry in reset-names.
|
||||
- reset-names: Must contain following for pcie qmp phys:
|
||||
- reset-names: Must contain following:
|
||||
"lane<lane-number>" for reset specific to each lane.
|
||||
|
||||
Example:
|
||||
|
@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel.
|
||||
Required properties:
|
||||
- compatible: should be "socionext,uniphier-scssi"
|
||||
- reg: address and length of the spi master registers
|
||||
- #address-cells: must be <1>, see spi-bus.txt
|
||||
- #size-cells: must be <0>, see spi-bus.txt
|
||||
- clocks: A phandle to the clock for the device.
|
||||
- resets: A phandle to the reset control for the device.
|
||||
- interrupts: a single interrupt specifier
|
||||
- pinctrl-names: should be "default"
|
||||
- pinctrl-0: pin control state for the default mode
|
||||
- clocks: a phandle to the clock for the device
|
||||
- resets: a phandle to the reset control for the device
|
||||
|
||||
Example:
|
||||
|
||||
spi0: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
reg = <0x54006000 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
18
Documentation/i2c/busses/i2c-nvidia-gpu
Normal file
18
Documentation/i2c/busses/i2c-nvidia-gpu
Normal file
@ -0,0 +1,18 @@
|
||||
Kernel driver i2c-nvidia-gpu
|
||||
|
||||
Datasheet: not publicly available.
|
||||
|
||||
Authors:
|
||||
Ajay Gupta <ajayg@nvidia.com>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
i2c-nvidia-gpu is a driver for I2C controller included in NVIDIA Turing
|
||||
and later GPUs and it is used to communicate with Type-C controller on GPUs.
|
||||
|
||||
If your 'lspci -v' listing shows something like the following,
|
||||
|
||||
01:00.3 Serial bus controller [0c80]: NVIDIA Corporation Device 1ad9 (rev a1)
|
||||
|
||||
then this driver should support the I2C controller of your GPU.
|
@ -190,16 +190,7 @@ A few EV_REL codes have special meanings:
|
||||
* REL_WHEEL, REL_HWHEEL:
|
||||
|
||||
- These codes are used for vertical and horizontal scroll wheels,
|
||||
respectively. The value is the number of "notches" moved on the wheel, the
|
||||
physical size of which varies by device. For high-resolution wheels (which
|
||||
report multiple events for each notch of movement, or do not have notches)
|
||||
this may be an approximation based on the high-resolution scroll events.
|
||||
|
||||
* REL_WHEEL_HI_RES:
|
||||
|
||||
- If a vertical scroll wheel supports high-resolution scrolling, this code
|
||||
will be emitted in addition to REL_WHEEL. The value is the (approximate)
|
||||
distance travelled by the user's finger, in microns.
|
||||
respectively.
|
||||
|
||||
EV_ABS
|
||||
------
|
||||
|
@ -40,7 +40,7 @@ To use the :ref:`format` ioctls applications set the ``type`` field of the
|
||||
the desired operation. Both drivers and applications must set the remainder of
|
||||
the :c:type:`v4l2_format` structure to 0.
|
||||
|
||||
.. _v4l2-meta-format:
|
||||
.. c:type:: v4l2_meta_format
|
||||
|
||||
.. tabularcolumns:: |p{1.4cm}|p{2.2cm}|p{13.9cm}|
|
||||
|
||||
|
@ -132,6 +132,11 @@ The format as returned by :ref:`VIDIOC_TRY_FMT <VIDIOC_G_FMT>` must be identical
|
||||
- ``sdr``
|
||||
- Definition of a data format, see :ref:`pixfmt`, used by SDR
|
||||
capture and output devices.
|
||||
* -
|
||||
- struct :c:type:`v4l2_meta_format`
|
||||
- ``meta``
|
||||
- Definition of a metadata format, see :ref:`meta-formats`, used by
|
||||
metadata capture devices.
|
||||
* -
|
||||
- __u8
|
||||
- ``raw_data``\ [200]
|
||||
|
@ -1056,18 +1056,23 @@ The kernel interface functions are as follows:
|
||||
|
||||
u32 rxrpc_kernel_check_life(struct socket *sock,
|
||||
struct rxrpc_call *call);
|
||||
void rxrpc_kernel_probe_life(struct socket *sock,
|
||||
struct rxrpc_call *call);
|
||||
|
||||
This returns a number that is updated when ACKs are received from the peer
|
||||
(notably including PING RESPONSE ACKs which we can elicit by sending PING
|
||||
ACKs to see if the call still exists on the server). The caller should
|
||||
compare the numbers of two calls to see if the call is still alive after
|
||||
waiting for a suitable interval.
|
||||
The first function returns a number that is updated when ACKs are received
|
||||
from the peer (notably including PING RESPONSE ACKs which we can elicit by
|
||||
sending PING ACKs to see if the call still exists on the server). The
|
||||
caller should compare the numbers of two calls to see if the call is still
|
||||
alive after waiting for a suitable interval.
|
||||
|
||||
This allows the caller to work out if the server is still contactable and
|
||||
if the call is still alive on the server whilst waiting for the server to
|
||||
process a client operation.
|
||||
|
||||
This function may transmit a PING ACK.
|
||||
The second function causes a ping ACK to be transmitted to try to provoke
|
||||
the peer into responding, which would then cause the value returned by the
|
||||
first function to change. Note that this must be called in TASK_RUNNING
|
||||
state.
|
||||
|
||||
(*) Get reply timestamp.
|
||||
|
||||
|
@ -92,3 +92,12 @@ Speculation misfeature controls
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);
|
||||
|
||||
- PR_SPEC_INDIR_BRANCH: Indirect Branch Speculation in User Processes
|
||||
(Mitigate Spectre V2 style attacks against user processes)
|
||||
|
||||
Invocations:
|
||||
* prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, 0, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_FORCE_DISABLE, 0, 0);
|
||||
|
@ -61,18 +61,6 @@ Protocol 2.12: (Kernel 3.8) Added the xloadflags field and extension fields
|
||||
to struct boot_params for loading bzImage and ramdisk
|
||||
above 4G in 64bit.
|
||||
|
||||
Protocol 2.13: (Kernel 3.14) Support 32- and 64-bit flags being set in
|
||||
xloadflags to support booting a 64-bit kernel from 32-bit
|
||||
EFI
|
||||
|
||||
Protocol 2.14: (Kernel 4.20) Added acpi_rsdp_addr holding the physical
|
||||
address of the ACPI RSDP table.
|
||||
The bootloader updates version with:
|
||||
0x8000 | min(kernel-version, bootloader-version)
|
||||
kernel-version being the protocol version supported by
|
||||
the kernel and bootloader-version the protocol version
|
||||
supported by the bootloader.
|
||||
|
||||
**** MEMORY LAYOUT
|
||||
|
||||
The traditional memory map for the kernel loader, used for Image or
|
||||
@ -209,7 +197,6 @@ Offset Proto Name Meaning
|
||||
0258/8 2.10+ pref_address Preferred loading address
|
||||
0260/4 2.10+ init_size Linear memory required during initialization
|
||||
0264/4 2.11+ handover_offset Offset of handover entry point
|
||||
0268/8 2.14+ acpi_rsdp_addr Physical address of RSDP table
|
||||
|
||||
(1) For backwards compatibility, if the setup_sects field contains 0, the
|
||||
real value is 4.
|
||||
@ -322,7 +309,7 @@ Protocol: 2.00+
|
||||
Contains the magic number "HdrS" (0x53726448).
|
||||
|
||||
Field name: version
|
||||
Type: modify
|
||||
Type: read
|
||||
Offset/size: 0x206/2
|
||||
Protocol: 2.00+
|
||||
|
||||
@ -330,12 +317,6 @@ Protocol: 2.00+
|
||||
e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version
|
||||
10.17.
|
||||
|
||||
Up to protocol version 2.13 this information is only read by the
|
||||
bootloader. From protocol version 2.14 onwards the bootloader will
|
||||
write the used protocol version or-ed with 0x8000 to the field. The
|
||||
used protocol version will be the minimum of the supported protocol
|
||||
versions of the bootloader and the kernel.
|
||||
|
||||
Field name: realmode_swtch
|
||||
Type: modify (optional)
|
||||
Offset/size: 0x208/4
|
||||
@ -763,17 +744,6 @@ Offset/size: 0x264/4
|
||||
|
||||
See EFI HANDOVER PROTOCOL below for more details.
|
||||
|
||||
Field name: acpi_rsdp_addr
|
||||
Type: write
|
||||
Offset/size: 0x268/8
|
||||
Protocol: 2.14+
|
||||
|
||||
This field can be set by the boot loader to tell the kernel the
|
||||
physical address of the ACPI RSDP table.
|
||||
|
||||
A value of 0 indicates the kernel should fall back to the standard
|
||||
methods to locate the RSDP.
|
||||
|
||||
|
||||
**** THE IMAGE CHECKSUM
|
||||
|
||||
|
@ -34,23 +34,24 @@ __________________|____________|__________________|_________|___________________
|
||||
____________________________________________________________|___________________________________________________________
|
||||
| | | |
|
||||
ffff800000000000 | -128 TB | ffff87ffffffffff | 8 TB | ... guard hole, also reserved for hypervisor
|
||||
ffff880000000000 | -120 TB | ffffc7ffffffffff | 64 TB | direct mapping of all physical memory (page_offset_base)
|
||||
ffffc80000000000 | -56 TB | ffffc8ffffffffff | 1 TB | ... unused hole
|
||||
ffff880000000000 | -120 TB | ffff887fffffffff | 0.5 TB | LDT remap for PTI
|
||||
ffff888000000000 | -119.5 TB | ffffc87fffffffff | 64 TB | direct mapping of all physical memory (page_offset_base)
|
||||
ffffc88000000000 | -55.5 TB | ffffc8ffffffffff | 0.5 TB | ... unused hole
|
||||
ffffc90000000000 | -55 TB | ffffe8ffffffffff | 32 TB | vmalloc/ioremap space (vmalloc_base)
|
||||
ffffe90000000000 | -23 TB | ffffe9ffffffffff | 1 TB | ... unused hole
|
||||
ffffea0000000000 | -22 TB | ffffeaffffffffff | 1 TB | virtual memory map (vmemmap_base)
|
||||
ffffeb0000000000 | -21 TB | ffffebffffffffff | 1 TB | ... unused hole
|
||||
ffffec0000000000 | -20 TB | fffffbffffffffff | 16 TB | KASAN shadow memory
|
||||
__________________|____________|__________________|_________|____________________________________________________________
|
||||
|
|
||||
| Identical layout to the 56-bit one from here on:
|
||||
____________________________________________________________|____________________________________________________________
|
||||
| | | |
|
||||
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
|
||||
| | | | vaddr_end for KASLR
|
||||
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | LDT remap for PTI
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
|
||||
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
|
||||
__________________|____________|__________________|_________|____________________________________________________________
|
||||
|
|
||||
| Identical layout to the 47-bit one from here on:
|
||||
____________________________________________________________|____________________________________________________________
|
||||
| | | |
|
||||
ffffff8000000000 | -512 GB | ffffffeeffffffff | 444 GB | ... unused hole
|
||||
ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
|
||||
ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
|
||||
@ -83,7 +84,7 @@ Notes:
|
||||
__________________|____________|__________________|_________|___________________________________________________________
|
||||
| | | |
|
||||
0000800000000000 | +64 PB | ffff7fffffffffff | ~16K PB | ... huge, still almost 64 bits wide hole of non-canonical
|
||||
| | | | virtual memory addresses up to the -128 TB
|
||||
| | | | virtual memory addresses up to the -64 PB
|
||||
| | | | starting offset of kernel mappings.
|
||||
__________________|____________|__________________|_________|___________________________________________________________
|
||||
|
|
||||
@ -91,23 +92,24 @@ __________________|____________|__________________|_________|___________________
|
||||
____________________________________________________________|___________________________________________________________
|
||||
| | | |
|
||||
ff00000000000000 | -64 PB | ff0fffffffffffff | 4 PB | ... guard hole, also reserved for hypervisor
|
||||
ff10000000000000 | -60 PB | ff8fffffffffffff | 32 PB | direct mapping of all physical memory (page_offset_base)
|
||||
ff90000000000000 | -28 PB | ff9fffffffffffff | 4 PB | LDT remap for PTI
|
||||
ff10000000000000 | -60 PB | ff10ffffffffffff | 0.25 PB | LDT remap for PTI
|
||||
ff11000000000000 | -59.75 PB | ff90ffffffffffff | 32 PB | direct mapping of all physical memory (page_offset_base)
|
||||
ff91000000000000 | -27.75 PB | ff9fffffffffffff | 3.75 PB | ... unused hole
|
||||
ffa0000000000000 | -24 PB | ffd1ffffffffffff | 12.5 PB | vmalloc/ioremap space (vmalloc_base)
|
||||
ffd2000000000000 | -11.5 PB | ffd3ffffffffffff | 0.5 PB | ... unused hole
|
||||
ffd4000000000000 | -11 PB | ffd5ffffffffffff | 0.5 PB | virtual memory map (vmemmap_base)
|
||||
ffd6000000000000 | -10.5 PB | ffdeffffffffffff | 2.25 PB | ... unused hole
|
||||
ffdf000000000000 | -8.25 PB | fffffdffffffffff | ~8 PB | KASAN shadow memory
|
||||
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
|
||||
| | | | vaddr_end for KASLR
|
||||
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
|
||||
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
|
||||
__________________|____________|__________________|_________|____________________________________________________________
|
||||
|
|
||||
| Identical layout to the 47-bit one from here on:
|
||||
____________________________________________________________|____________________________________________________________
|
||||
| | | |
|
||||
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
|
||||
| | | | vaddr_end for KASLR
|
||||
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
|
||||
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
|
||||
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
|
||||
ffffff8000000000 | -512 GB | ffffffeeffffffff | 444 GB | ... unused hole
|
||||
ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
|
||||
ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
|
||||
|
@ -25,7 +25,7 @@ Offset Proto Name Meaning
|
||||
0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
|
||||
140/080 ALL edid_info Video mode setup (struct edid_info)
|
||||
1C0/020 ALL efi_info EFI 32 information (struct efi_info)
|
||||
1E0/004 ALL alk_mem_k Alternative mem check, in KB
|
||||
1E0/004 ALL alt_mem_k Alternative mem check, in KB
|
||||
1E4/004 ALL scratch Scratch field for the kernel setup code
|
||||
1E8/001 ALL e820_entries Number of entries in e820_table (below)
|
||||
1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)
|
||||
|
208
MAINTAINERS
208
MAINTAINERS
@ -180,6 +180,7 @@ F: drivers/net/hamradio/6pack.c
|
||||
|
||||
8169 10/100/1000 GIGABIT ETHERNET DRIVER
|
||||
M: Realtek linux nic maintainers <nic_swsd@realtek.com>
|
||||
M: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/realtek/r8169.c
|
||||
@ -717,7 +718,7 @@ F: include/linux/mfd/altera-a10sr.h
|
||||
F: include/dt-bindings/reset/altr,rst-mgr-a10sr.h
|
||||
|
||||
ALTERA TRIPLE SPEED ETHERNET DRIVER
|
||||
M: Vince Bridgers <vbridger@opensource.altera.com>
|
||||
M: Thor Thayer <thor.thayer@linux.intel.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
@ -1930,7 +1931,6 @@ ARM/QUALCOMM SUPPORT
|
||||
M: Andy Gross <andy.gross@linaro.org>
|
||||
M: David Brown <david.brown@linaro.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
L: linux-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/soc/qcom/
|
||||
F: arch/arm/boot/dts/qcom-*.dts
|
||||
@ -2498,7 +2498,7 @@ F: drivers/net/wireless/ath/*
|
||||
ATHEROS ATH5K WIRELESS DRIVER
|
||||
M: Jiri Slaby <jirislaby@gmail.com>
|
||||
M: Nick Kossifidis <mickflemm@gmail.com>
|
||||
M: "Luis R. Rodriguez" <mcgrof@do-not-panic.com>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/ath5k
|
||||
S: Maintained
|
||||
@ -2808,7 +2808,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git
|
||||
Q: https://patchwork.ozlabs.org/project/netdev/list/?delegate=77147
|
||||
S: Supported
|
||||
F: arch/x86/net/bpf_jit*
|
||||
F: arch/*/net/*
|
||||
F: Documentation/networking/filter.txt
|
||||
F: Documentation/bpf/
|
||||
F: include/linux/bpf*
|
||||
@ -2828,6 +2828,67 @@ F: tools/bpf/
|
||||
F: tools/lib/bpf/
|
||||
F: tools/testing/selftests/bpf/
|
||||
|
||||
BPF JIT for ARM
|
||||
M: Shubham Bansal <illusionist.neo@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/net/
|
||||
|
||||
BPF JIT for ARM64
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
M: Alexei Starovoitov <ast@kernel.org>
|
||||
M: Zi Shen Lim <zlim.lnx@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/arm64/net/
|
||||
|
||||
BPF JIT for MIPS (32-BIT AND 64-BIT)
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/net/
|
||||
|
||||
BPF JIT for NFP NICs
|
||||
M: Jakub Kicinski <jakub.kicinski@netronome.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/netronome/nfp/bpf/
|
||||
|
||||
BPF JIT for POWERPC (32-BIT AND 64-BIT)
|
||||
M: Naveen N. Rao <naveen.n.rao@linux.ibm.com>
|
||||
M: Sandipan Das <sandipan@linux.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/powerpc/net/
|
||||
|
||||
BPF JIT for S390
|
||||
M: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
||||
M: Heiko Carstens <heiko.carstens@de.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/s390/net/
|
||||
X: arch/s390/net/pnet.c
|
||||
|
||||
BPF JIT for SPARC (32-BIT AND 64-BIT)
|
||||
M: David S. Miller <davem@davemloft.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/sparc/net/
|
||||
|
||||
BPF JIT for X86 32-BIT
|
||||
M: Wang YanQing <udknight@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/x86/net/bpf_jit_comp32.c
|
||||
|
||||
BPF JIT for X86 64-BIT
|
||||
M: Alexei Starovoitov <ast@kernel.org>
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/x86/net/
|
||||
X: arch/x86/net/bpf_jit_comp32.c
|
||||
|
||||
BROADCOM B44 10/100 ETHERNET DRIVER
|
||||
M: Michael Chan <michael.chan@broadcom.com>
|
||||
L: netdev@vger.kernel.org
|
||||
@ -2868,7 +2929,7 @@ F: drivers/staging/vc04_services
|
||||
BROADCOM BCM47XX MIPS ARCHITECTURE
|
||||
M: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/mips/brcm/
|
||||
F: arch/mips/bcm47xx/*
|
||||
@ -2877,7 +2938,6 @@ F: arch/mips/include/asm/mach-bcm47xx/*
|
||||
BROADCOM BCM5301X ARM ARCHITECTURE
|
||||
M: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
M: Jon Mason <jonmason@broadcom.com>
|
||||
M: bcm-kernel-feedback-list@broadcom.com
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
S: Maintained
|
||||
@ -2932,7 +2992,7 @@ F: drivers/cpufreq/bmips-cpufreq.c
|
||||
BROADCOM BMIPS MIPS ARCHITECTURE
|
||||
M: Kevin Cernekee <cernekee@gmail.com>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
T: git git://github.com/broadcom/stblinux.git
|
||||
S: Maintained
|
||||
F: arch/mips/bmips/*
|
||||
@ -3023,7 +3083,6 @@ F: drivers/net/ethernet/broadcom/genet/
|
||||
BROADCOM IPROC ARM ARCHITECTURE
|
||||
M: Ray Jui <rjui@broadcom.com>
|
||||
M: Scott Branden <sbranden@broadcom.com>
|
||||
M: Jon Mason <jonmason@broadcom.com>
|
||||
M: bcm-kernel-feedback-list@broadcom.com
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://github.com/broadcom/cygnus-linux.git
|
||||
@ -3070,7 +3129,7 @@ F: include/uapi/rdma/bnxt_re-abi.h
|
||||
|
||||
BROADCOM NVRAM DRIVER
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/firmware/broadcom/*
|
||||
|
||||
@ -3284,6 +3343,12 @@ F: include/uapi/linux/caif/
|
||||
F: include/net/caif/
|
||||
F: net/caif/
|
||||
|
||||
CAKE QDISC
|
||||
M: Toke Høiland-Jørgensen <toke@toke.dk>
|
||||
L: cake@lists.bufferbloat.net (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: net/sched/sch_cake.c
|
||||
|
||||
CALGARY x86-64 IOMMU
|
||||
M: Muli Ben-Yehuda <mulix@mulix.org>
|
||||
M: Jon Mason <jdmason@kudzu.us>
|
||||
@ -4166,7 +4231,7 @@ F: net/decnet/
|
||||
|
||||
DECSTATION PLATFORM SUPPORT
|
||||
M: "Maciej W. Rozycki" <macro@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
W: http://www.linux-mips.org/wiki/DECstation
|
||||
S: Maintained
|
||||
F: arch/mips/dec/
|
||||
@ -5257,7 +5322,7 @@ EDAC-CAVIUM OCTEON
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
M: David Daney <david.daney@cavium.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/edac/octeon_edac*
|
||||
|
||||
@ -5536,6 +5601,7 @@ F: net/bridge/
|
||||
ETHERNET PHY LIBRARY
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
M: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/ABI/testing/sysfs-bus-mdio
|
||||
@ -5774,7 +5840,7 @@ F: include/uapi/linux/firewire*.h
|
||||
F: tools/firewire/
|
||||
|
||||
FIRMWARE LOADER (request_firmware)
|
||||
M: Luis R. Rodriguez <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/firmware_class/
|
||||
@ -6307,6 +6373,7 @@ F: tools/testing/selftests/gpio/
|
||||
|
||||
GPIO SUBSYSTEM
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
M: Bartosz Golaszewski <bgolaszewski@baylibre.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
|
||||
S: Maintained
|
||||
@ -6615,9 +6682,9 @@ F: arch/*/include/asm/suspend*.h
|
||||
|
||||
HID CORE LAYER
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
R: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
L: linux-input@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
S: Maintained
|
||||
F: drivers/hid/
|
||||
F: include/linux/hid*
|
||||
@ -6869,6 +6936,13 @@ L: linux-acpi@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/i2c-core-acpi.c
|
||||
|
||||
I2C CONTROLLER DRIVER FOR NVIDIA GPU
|
||||
M: Ajay Gupta <ajayg@nvidia.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-nvidia-gpu
|
||||
F: drivers/i2c/busses/i2c-nvidia-gpu.c
|
||||
|
||||
I2C MUXES
|
||||
M: Peter Rosin <peda@axentia.se>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
@ -7437,6 +7511,20 @@ S: Maintained
|
||||
F: Documentation/fb/intelfb.txt
|
||||
F: drivers/video/fbdev/intelfb/
|
||||
|
||||
INTEL GPIO DRIVERS
|
||||
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git
|
||||
F: drivers/gpio/gpio-ich.c
|
||||
F: drivers/gpio/gpio-intel-mid.c
|
||||
F: drivers/gpio/gpio-lynxpoint.c
|
||||
F: drivers/gpio/gpio-merrifield.c
|
||||
F: drivers/gpio/gpio-ml-ioh.c
|
||||
F: drivers/gpio/gpio-pch.c
|
||||
F: drivers/gpio/gpio-sch.c
|
||||
F: drivers/gpio/gpio-sodaville.c
|
||||
|
||||
INTEL GVT-g DRIVERS (Intel GPU Virtualization)
|
||||
M: Zhenyu Wang <zhenyuw@linux.intel.com>
|
||||
M: Zhi Wang <zhi.a.wang@intel.com>
|
||||
@ -7447,12 +7535,6 @@ T: git https://github.com/intel/gvt-linux.git
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/i915/gvt/
|
||||
|
||||
INTEL PMIC GPIO DRIVER
|
||||
R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-*cove.c
|
||||
F: drivers/gpio/gpio-msic.c
|
||||
|
||||
INTEL HID EVENT DRIVER
|
||||
M: Alex Hung <alex.hung@canonical.com>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
@ -7540,12 +7622,6 @@ W: https://01.org/linux-acpi
|
||||
S: Supported
|
||||
F: drivers/platform/x86/intel_menlow.c
|
||||
|
||||
INTEL MERRIFIELD GPIO DRIVER
|
||||
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-merrifield.c
|
||||
|
||||
INTEL MIC DRIVERS (mic)
|
||||
M: Sudeep Dutt <sudeep.dutt@intel.com>
|
||||
M: Ashutosh Dixit <ashutosh.dixit@intel.com>
|
||||
@ -7578,6 +7654,13 @@ F: drivers/platform/x86/intel_punit_ipc.c
|
||||
F: arch/x86/include/asm/intel_pmc_ipc.h
|
||||
F: arch/x86/include/asm/intel_punit_ipc.h
|
||||
|
||||
INTEL PMIC GPIO DRIVERS
|
||||
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git
|
||||
F: drivers/gpio/gpio-*cove.c
|
||||
F: drivers/gpio/gpio-msic.c
|
||||
|
||||
INTEL MULTIFUNCTION PMIC DEVICE DRIVERS
|
||||
R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
S: Maintained
|
||||
@ -7686,7 +7769,7 @@ F: Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.txt
|
||||
|
||||
IOC3 ETHERNET DRIVER
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/sgi/ioc3-eth.c
|
||||
|
||||
@ -8057,7 +8140,7 @@ F: tools/testing/selftests/
|
||||
F: Documentation/dev-tools/kselftest*
|
||||
|
||||
KERNEL USERMODE HELPER
|
||||
M: "Luis R. Rodriguez" <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: kernel/umh.c
|
||||
@ -8114,7 +8197,7 @@ F: arch/arm64/kvm/
|
||||
|
||||
KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips)
|
||||
M: James Hogan <jhogan@kernel.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/mips/include/uapi/asm/kvm*
|
||||
F: arch/mips/include/asm/kvm*
|
||||
@ -8233,7 +8316,7 @@ F: mm/kmemleak.c
|
||||
F: mm/kmemleak-test.c
|
||||
|
||||
KMOD KERNEL MODULE LOADER - USERMODE HELPER
|
||||
M: "Luis R. Rodriguez" <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: kernel/kmod.c
|
||||
@ -8287,7 +8370,7 @@ F: drivers/net/dsa/lantiq_gswip.c
|
||||
|
||||
LANTIQ MIPS ARCHITECTURE
|
||||
M: John Crispin <john@phrozen.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/lantiq
|
||||
F: drivers/soc/lantiq
|
||||
@ -8375,7 +8458,7 @@ F: drivers/media/dvb-frontends/lgdt3305.*
|
||||
LIBATA PATA ARASAN COMPACT FLASH CONTROLLER
|
||||
M: Viresh Kumar <vireshk@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: include/linux/pata_arasan_cf_data.h
|
||||
F: drivers/ata/pata_arasan_cf.c
|
||||
@ -8392,7 +8475,7 @@ F: drivers/ata/ata_generic.c
|
||||
LIBATA PATA FARADAY FTIDE010 AND GEMINI SATA BRIDGE DRIVERS
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: drivers/ata/pata_ftide010.c
|
||||
F: drivers/ata/sata_gemini.c
|
||||
@ -8411,7 +8494,7 @@ F: include/linux/ahci_platform.h
|
||||
LIBATA SATA PROMISE TX2/TX4 CONTROLLER DRIVER
|
||||
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
S: Maintained
|
||||
F: drivers/ata/sata_promise.*
|
||||
|
||||
@ -8850,7 +8933,7 @@ S: Maintained
|
||||
|
||||
MARDUK (CREATOR CI40) DEVICE TREE SUPPORT
|
||||
M: Rahul Bedarkar <rahulbedarkar89@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/img/pistachio_marduk.dts
|
||||
|
||||
@ -9809,7 +9892,7 @@ F: drivers/dma/at_xdmac.c
|
||||
|
||||
MICROSEMI MIPS SOCS
|
||||
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/generic/board-ocelot.c
|
||||
F: arch/mips/configs/generic/board-ocelot.config
|
||||
@ -9849,7 +9932,7 @@ MIPS
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
M: James Hogan <jhogan@kernel.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
W: http://www.linux-mips.org/
|
||||
T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git
|
||||
@ -9862,7 +9945,7 @@ F: drivers/platform/mips/
|
||||
|
||||
MIPS BOSTON DEVELOPMENT BOARD
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
|
||||
F: arch/mips/boot/dts/img/boston.dts
|
||||
@ -9872,7 +9955,7 @@ F: include/dt-bindings/clock/boston-clock.h
|
||||
|
||||
MIPS GENERIC PLATFORM
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
|
||||
F: arch/mips/generic/
|
||||
@ -9880,7 +9963,7 @@ F: arch/mips/tools/generic-board-config.sh
|
||||
|
||||
MIPS/LOONGSON1 ARCHITECTURE
|
||||
M: Keguang Zhang <keguang.zhang@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/loongson32/
|
||||
F: arch/mips/include/asm/mach-loongson32/
|
||||
@ -9889,7 +9972,7 @@ F: drivers/*/*/*loongson1*
|
||||
|
||||
MIPS/LOONGSON2 ARCHITECTURE
|
||||
M: Jiaxun Yang <jiaxun.yang@flygoat.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/loongson64/fuloong-2e/
|
||||
F: arch/mips/loongson64/lemote-2f/
|
||||
@ -9899,7 +9982,7 @@ F: drivers/*/*/*loongson2*
|
||||
|
||||
MIPS/LOONGSON3 ARCHITECTURE
|
||||
M: Huacai Chen <chenhc@lemote.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/loongson64/
|
||||
F: arch/mips/include/asm/mach-loongson64/
|
||||
@ -9909,7 +9992,7 @@ F: drivers/*/*/*loongson3*
|
||||
|
||||
MIPS RINT INSTRUCTION EMULATION
|
||||
M: Aleksandar Markovic <aleksandar.markovic@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/mips/math-emu/sp_rint.c
|
||||
F: arch/mips/math-emu/dp_rint.c
|
||||
@ -10792,6 +10875,14 @@ L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/mach-omap2/omap_hwmod.*
|
||||
|
||||
OMAP I2C DRIVER
|
||||
M: Vignesh R <vigneshr@ti.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/i2c/i2c-omap.txt
|
||||
F: drivers/i2c/busses/i2c-omap.c
|
||||
|
||||
OMAP IMAGING SUBSYSTEM (OMAP3 ISP and OMAP4 ISS)
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
@ -10801,9 +10892,9 @@ F: drivers/media/platform/omap3isp/
|
||||
F: drivers/staging/media/omap4iss/
|
||||
|
||||
OMAP MMC SUPPORT
|
||||
M: Jarkko Lavinen <jarkko.lavinen@nokia.com>
|
||||
M: Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: drivers/mmc/host/omap.c
|
||||
|
||||
OMAP POWER MANAGEMENT SUPPORT
|
||||
@ -10886,7 +10977,7 @@ F: include/linux/platform_data/i2c-omap.h
|
||||
|
||||
ONION OMEGA2+ BOARD
|
||||
M: Harvey Hunt <harveyhuntnexus@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/ralink/omega2p.dts
|
||||
|
||||
@ -11738,6 +11829,7 @@ F: Documentation/devicetree/bindings/pinctrl/fsl,*
|
||||
PIN CONTROLLER - INTEL
|
||||
M: Mika Westerberg <mika.westerberg@linux.intel.com>
|
||||
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/intel/
|
||||
|
||||
@ -11794,7 +11886,7 @@ F: drivers/pinctrl/spear/
|
||||
|
||||
PISTACHIO SOC SUPPORT
|
||||
M: James Hartley <james.hartley@sondrel.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Odd Fixes
|
||||
F: arch/mips/pistachio/
|
||||
F: arch/mips/include/asm/mach-pistachio/
|
||||
@ -11981,7 +12073,7 @@ F: kernel/printk/
|
||||
F: include/linux/printk.h
|
||||
|
||||
PRISM54 WIRELESS DRIVER
|
||||
M: "Luis R. Rodriguez" <mcgrof@gmail.com>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/p54
|
||||
S: Obsolete
|
||||
@ -11995,9 +12087,10 @@ S: Maintained
|
||||
F: fs/proc/
|
||||
F: include/linux/proc_fs.h
|
||||
F: tools/testing/selftests/proc/
|
||||
F: Documentation/filesystems/proc.txt
|
||||
|
||||
PROC SYSCTL
|
||||
M: "Luis R. Rodriguez" <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
M: Kees Cook <keescook@chromium.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
@ -12460,7 +12553,7 @@ F: drivers/media/usb/rainshadow-cec/*
|
||||
|
||||
RALINK MIPS ARCHITECTURE
|
||||
M: John Crispin <john@phrozen.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/ralink
|
||||
|
||||
@ -12480,7 +12573,7 @@ F: drivers/block/brd.c
|
||||
|
||||
RANCHU VIRTUAL BOARD FOR MIPS
|
||||
M: Miodrag Dinic <miodrag.dinic@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/mips/generic/board-ranchu.c
|
||||
F: arch/mips/configs/generic/board-ranchu.config
|
||||
@ -13931,6 +14024,7 @@ S: Supported
|
||||
F: Documentation/devicetree/bindings/sound/
|
||||
F: Documentation/sound/soc/
|
||||
F: sound/soc/
|
||||
F: include/dt-bindings/sound/
|
||||
F: include/sound/soc*
|
||||
|
||||
SOUNDWIRE SUBSYSTEM
|
||||
@ -13978,11 +14072,10 @@ F: drivers/tty/serial/sunzilog.h
|
||||
F: drivers/tty/vcc.c
|
||||
|
||||
SPARSE CHECKER
|
||||
M: "Christopher Li" <sparse@chrisli.org>
|
||||
M: "Luc Van Oostenryck" <luc.vanoostenryck@gmail.com>
|
||||
L: linux-sparse@vger.kernel.org
|
||||
W: https://sparse.wiki.kernel.org/
|
||||
T: git git://git.kernel.org/pub/scm/devel/sparse/sparse.git
|
||||
T: git git://git.kernel.org/pub/scm/devel/sparse/chrisl/sparse.git
|
||||
S: Maintained
|
||||
F: include/linux/compiler.h
|
||||
|
||||
@ -14087,6 +14180,7 @@ F: Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt
|
||||
|
||||
STABLE BRANCH
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
M: Sasha Levin <sashal@kernel.org>
|
||||
L: stable@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/process/stable-kernel-rules.rst
|
||||
@ -15224,7 +15318,7 @@ F: arch/um/os-Linux/drivers/
|
||||
TURBOCHANNEL SUBSYSTEM
|
||||
M: "Maciej W. Rozycki" <macro@linux-mips.org>
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
Q: http://patchwork.linux-mips.org/project/linux-mips/list/
|
||||
S: Maintained
|
||||
F: drivers/tc/
|
||||
@ -15460,9 +15554,9 @@ F: include/linux/usb/gadget*
|
||||
|
||||
USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
|
||||
M: Jiri Kosina <jikos@kernel.org>
|
||||
R: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
M: Benjamin Tissoires <benjamin.tissoires@redhat.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
|
||||
S: Maintained
|
||||
F: Documentation/hid/hiddev.txt
|
||||
F: drivers/hid/usbhid/
|
||||
@ -16045,7 +16139,7 @@ F: drivers/net/vmxnet3/
|
||||
|
||||
VOCORE VOCORE2 BOARD
|
||||
M: Harvey Hunt <harveyhuntnexus@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/ralink/vocore2.dts
|
||||
|
||||
|
4
Makefile
4
Makefile
@ -2,8 +2,8 @@
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 20
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = "People's Front"
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Shy Crocodile
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
@ -73,9 +73,15 @@
|
||||
})
|
||||
|
||||
#define user_termios_to_kernel_termios(k, u) \
|
||||
copy_from_user(k, u, sizeof(struct termios))
|
||||
copy_from_user(k, u, sizeof(struct termios2))
|
||||
|
||||
#define kernel_termios_to_user_termios(u, k) \
|
||||
copy_to_user(u, k, sizeof(struct termios2))
|
||||
|
||||
#define user_termios_to_kernel_termios_1(k, u) \
|
||||
copy_from_user(k, u, sizeof(struct termios))
|
||||
|
||||
#define kernel_termios_to_user_termios_1(u, k) \
|
||||
copy_to_user(u, k, sizeof(struct termios))
|
||||
|
||||
#endif /* _ALPHA_TERMIOS_H */
|
||||
|
@ -32,6 +32,11 @@
|
||||
#define TCXONC _IO('t', 30)
|
||||
#define TCFLSH _IO('t', 31)
|
||||
|
||||
#define TCGETS2 _IOR('T', 42, struct termios2)
|
||||
#define TCSETS2 _IOW('T', 43, struct termios2)
|
||||
#define TCSETSW2 _IOW('T', 44, struct termios2)
|
||||
#define TCSETSF2 _IOW('T', 45, struct termios2)
|
||||
|
||||
#define TIOCSWINSZ _IOW('t', 103, struct winsize)
|
||||
#define TIOCGWINSZ _IOR('t', 104, struct winsize)
|
||||
#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
|
||||
|
@ -26,6 +26,19 @@ struct termios {
|
||||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* Alpha has identical termios and termios2 */
|
||||
|
||||
struct termios2 {
|
||||
tcflag_t c_iflag; /* input mode flags */
|
||||
tcflag_t c_oflag; /* output mode flags */
|
||||
tcflag_t c_cflag; /* control mode flags */
|
||||
tcflag_t c_lflag; /* local mode flags */
|
||||
cc_t c_cc[NCCS]; /* control characters */
|
||||
cc_t c_line; /* line discipline (== c_cc[19]) */
|
||||
speed_t c_ispeed; /* input speed */
|
||||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* Alpha has matching termios and ktermios */
|
||||
|
||||
struct ktermios {
|
||||
@ -152,6 +165,7 @@ struct ktermios {
|
||||
#define B3000000 00034
|
||||
#define B3500000 00035
|
||||
#define B4000000 00036
|
||||
#define BOTHER 00037
|
||||
|
||||
#define CSIZE 00001400
|
||||
#define CS5 00000000
|
||||
@ -169,6 +183,9 @@ struct ktermios {
|
||||
#define CMSPAR 010000000000 /* mark or space (stick) parity */
|
||||
#define CRTSCTS 020000000000 /* flow control */
|
||||
|
||||
#define CIBAUD 07600000
|
||||
#define IBSHIFT 16
|
||||
|
||||
/* c_lflag bits */
|
||||
#define ISIG 0x00000080
|
||||
#define ICANON 0x00000100
|
||||
|
@ -228,7 +228,7 @@
|
||||
vmmc-supply = <&vmmc_fixed>;
|
||||
bus-width = <4>;
|
||||
wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
|
||||
cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
|
||||
cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
@ -163,7 +163,7 @@
|
||||
compatible = "ti,wl1271";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; /* gpio_170 */
|
||||
interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
|
||||
ref-clock-frequency = <26000000>;
|
||||
tcxo-clock-frequency = <26000000>;
|
||||
};
|
||||
|
@ -492,12 +492,6 @@
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c04";
|
||||
pagesize = <16>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
hpa1: amp@60 {
|
||||
compatible = "ti,tpa6130a2";
|
||||
reg = <0x60>;
|
||||
|
@ -55,7 +55,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "&uart1:115200n8";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@70000000 {
|
||||
|
@ -740,7 +740,7 @@
|
||||
i2c1: i2c@21a0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
|
||||
compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a0000 0x4000>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SLL_CLK_I2C1>;
|
||||
|
@ -117,7 +117,9 @@
|
||||
regulator-name = "enet_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_pcie_gpio: regulator-pcie-gpio {
|
||||
@ -180,6 +182,7 @@
|
||||
phy-supply = <®_enet_3v3>;
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <ðphy1>;
|
||||
phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
@ -373,6 +376,8 @@
|
||||
MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
|
||||
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
|
||||
MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
|
||||
/* phy reset */
|
||||
MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0x10b0
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -129,7 +129,7 @@
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
|
||||
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
|
@ -35,7 +35,7 @@
|
||||
* jumpering combinations for the long run.
|
||||
*/
|
||||
&mmc3 {
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
|
||||
pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
|
@ -10,7 +10,11 @@
|
||||
#include "rk3288.dtsi"
|
||||
|
||||
/ {
|
||||
memory@0 {
|
||||
/*
|
||||
* The default coreboot on veyron devices ignores memory@0 nodes
|
||||
* and would instead create another memory node.
|
||||
*/
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
@ -314,7 +314,7 @@
|
||||
0x1 0x0 0x60000000 0x10000000
|
||||
0x2 0x0 0x70000000 0x10000000
|
||||
0x3 0x0 0x80000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
clocks = <&h32ck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
|
@ -50,8 +50,8 @@
|
||||
compatible = "fsl,vf610m4";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyLP2,115200 clk_ignore_unused init=/linuxrc rw";
|
||||
stdout-path = "&uart2";
|
||||
bootargs = "clk_ignore_unused init=/linuxrc rw";
|
||||
stdout-path = "serial2:115200";
|
||||
};
|
||||
|
||||
memory@8c000000 {
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EMBEDDED=y
|
||||
|
@ -111,6 +111,7 @@
|
||||
#include <linux/kernel.h>
|
||||
|
||||
extern unsigned int processor_id;
|
||||
struct proc_info_list *lookup_processor(u32 midr);
|
||||
|
||||
#ifdef CONFIG_CPU_CP15
|
||||
#define read_cpuid(reg) \
|
||||
|
@ -10,7 +10,7 @@
|
||||
#ifndef _ASM_PGTABLE_2LEVEL_H
|
||||
#define _ASM_PGTABLE_2LEVEL_H
|
||||
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
|
||||
/*
|
||||
* Hardware-wise, we have a two level page table structure, where the first
|
||||
|
@ -23,7 +23,7 @@ struct mm_struct;
|
||||
/*
|
||||
* Don't change this structure - ASM code relies on it.
|
||||
*/
|
||||
extern struct processor {
|
||||
struct processor {
|
||||
/* MISC
|
||||
* get data abort address/flags
|
||||
*/
|
||||
@ -79,9 +79,13 @@ extern struct processor {
|
||||
unsigned int suspend_size;
|
||||
void (*do_suspend)(void *);
|
||||
void (*do_resume)(void *);
|
||||
} processor;
|
||||
};
|
||||
|
||||
#ifndef MULTI_CPU
|
||||
static inline void init_proc_vtable(const struct processor *p)
|
||||
{
|
||||
}
|
||||
|
||||
extern void cpu_proc_init(void);
|
||||
extern void cpu_proc_fin(void);
|
||||
extern int cpu_do_idle(void);
|
||||
@ -98,17 +102,50 @@ extern void cpu_reset(unsigned long addr, bool hvc) __attribute__((noreturn));
|
||||
extern void cpu_do_suspend(void *);
|
||||
extern void cpu_do_resume(void *);
|
||||
#else
|
||||
#define cpu_proc_init processor._proc_init
|
||||
#define cpu_proc_fin processor._proc_fin
|
||||
#define cpu_reset processor.reset
|
||||
#define cpu_do_idle processor._do_idle
|
||||
#define cpu_dcache_clean_area processor.dcache_clean_area
|
||||
#define cpu_set_pte_ext processor.set_pte_ext
|
||||
#define cpu_do_switch_mm processor.switch_mm
|
||||
|
||||
/* These three are private to arch/arm/kernel/suspend.c */
|
||||
#define cpu_do_suspend processor.do_suspend
|
||||
#define cpu_do_resume processor.do_resume
|
||||
extern struct processor processor;
|
||||
#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
#include <linux/smp.h>
|
||||
/*
|
||||
* This can't be a per-cpu variable because we need to access it before
|
||||
* per-cpu has been initialised. We have a couple of functions that are
|
||||
* called in a pre-emptible context, and so can't use smp_processor_id()
|
||||
* there, hence PROC_TABLE(). We insist in init_proc_vtable() that the
|
||||
* function pointers for these are identical across all CPUs.
|
||||
*/
|
||||
extern struct processor *cpu_vtable[];
|
||||
#define PROC_VTABLE(f) cpu_vtable[smp_processor_id()]->f
|
||||
#define PROC_TABLE(f) cpu_vtable[0]->f
|
||||
static inline void init_proc_vtable(const struct processor *p)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
*cpu_vtable[cpu] = *p;
|
||||
WARN_ON_ONCE(cpu_vtable[cpu]->dcache_clean_area !=
|
||||
cpu_vtable[0]->dcache_clean_area);
|
||||
WARN_ON_ONCE(cpu_vtable[cpu]->set_pte_ext !=
|
||||
cpu_vtable[0]->set_pte_ext);
|
||||
}
|
||||
#else
|
||||
#define PROC_VTABLE(f) processor.f
|
||||
#define PROC_TABLE(f) processor.f
|
||||
static inline void init_proc_vtable(const struct processor *p)
|
||||
{
|
||||
processor = *p;
|
||||
}
|
||||
#endif
|
||||
|
||||
#define cpu_proc_init PROC_VTABLE(_proc_init)
|
||||
#define cpu_check_bugs PROC_VTABLE(check_bugs)
|
||||
#define cpu_proc_fin PROC_VTABLE(_proc_fin)
|
||||
#define cpu_reset PROC_VTABLE(reset)
|
||||
#define cpu_do_idle PROC_VTABLE(_do_idle)
|
||||
#define cpu_dcache_clean_area PROC_TABLE(dcache_clean_area)
|
||||
#define cpu_set_pte_ext PROC_TABLE(set_pte_ext)
|
||||
#define cpu_do_switch_mm PROC_VTABLE(switch_mm)
|
||||
|
||||
/* These two are private to arch/arm/kernel/suspend.c */
|
||||
#define cpu_do_suspend PROC_VTABLE(do_suspend)
|
||||
#define cpu_do_resume PROC_VTABLE(do_resume)
|
||||
#endif
|
||||
|
||||
extern void cpu_resume(void);
|
||||
|
@ -6,8 +6,8 @@
|
||||
void check_other_bugs(void)
|
||||
{
|
||||
#ifdef MULTI_CPU
|
||||
if (processor.check_bugs)
|
||||
processor.check_bugs();
|
||||
if (cpu_check_bugs)
|
||||
cpu_check_bugs();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -183,9 +183,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
unsigned long frame_pointer)
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long) &return_to_handler;
|
||||
struct ftrace_graph_ent trace;
|
||||
unsigned long old;
|
||||
int err;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return;
|
||||
@ -193,21 +191,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
old = *parent;
|
||||
*parent = return_hooker;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
if (function_graph_enter(old, self_addr, frame_pointer, NULL))
|
||||
*parent = old;
|
||||
return;
|
||||
}
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
frame_pointer, NULL);
|
||||
if (err == -EBUSY) {
|
||||
*parent = old;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||
|
@ -145,6 +145,9 @@ __mmap_switched_data:
|
||||
#endif
|
||||
.size __mmap_switched_data, . - __mmap_switched_data
|
||||
|
||||
__FINIT
|
||||
.text
|
||||
|
||||
/*
|
||||
* This provides a C-API version of __lookup_processor_type
|
||||
*/
|
||||
@ -156,9 +159,6 @@ ENTRY(lookup_processor_type)
|
||||
ldmfd sp!, {r4 - r6, r9, pc}
|
||||
ENDPROC(lookup_processor_type)
|
||||
|
||||
__FINIT
|
||||
.text
|
||||
|
||||
/*
|
||||
* Read processor ID register (CP#15, CR0), and look up in the linker-built
|
||||
* supported processor list. Note that we can't use the absolute addresses
|
||||
|
@ -114,6 +114,11 @@ EXPORT_SYMBOL(elf_hwcap2);
|
||||
|
||||
#ifdef MULTI_CPU
|
||||
struct processor processor __ro_after_init;
|
||||
#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
struct processor *cpu_vtable[NR_CPUS] = {
|
||||
[0] = &processor,
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
#ifdef MULTI_TLB
|
||||
struct cpu_tlb_fns cpu_tlb __ro_after_init;
|
||||
@ -666,28 +671,33 @@ static void __init smp_build_mpidr_hash(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* locate processor in the list of supported processor types. The linker
|
||||
* builds this table for us from the entries in arch/arm/mm/proc-*.S
|
||||
*/
|
||||
struct proc_info_list *lookup_processor(u32 midr)
|
||||
{
|
||||
struct proc_info_list *list = lookup_processor_type(midr);
|
||||
|
||||
if (!list) {
|
||||
pr_err("CPU%u: configuration botched (ID %08x), CPU halted\n",
|
||||
smp_processor_id(), midr);
|
||||
while (1)
|
||||
/* can't use cpu_relax() here as it may require MMU setup */;
|
||||
}
|
||||
|
||||
return list;
|
||||
}
|
||||
|
||||
static void __init setup_processor(void)
|
||||
{
|
||||
struct proc_info_list *list;
|
||||
|
||||
/*
|
||||
* locate processor in the list of supported processor
|
||||
* types. The linker builds this table for us from the
|
||||
* entries in arch/arm/mm/proc-*.S
|
||||
*/
|
||||
list = lookup_processor_type(read_cpuid_id());
|
||||
if (!list) {
|
||||
pr_err("CPU configuration botched (ID %08x), unable to continue.\n",
|
||||
read_cpuid_id());
|
||||
while (1);
|
||||
}
|
||||
unsigned int midr = read_cpuid_id();
|
||||
struct proc_info_list *list = lookup_processor(midr);
|
||||
|
||||
cpu_name = list->cpu_name;
|
||||
__cpu_architecture = __get_cpu_architecture();
|
||||
|
||||
#ifdef MULTI_CPU
|
||||
processor = *list->proc;
|
||||
#endif
|
||||
init_proc_vtable(list->proc);
|
||||
#ifdef MULTI_TLB
|
||||
cpu_tlb = *list->tlb;
|
||||
#endif
|
||||
@ -699,7 +709,7 @@ static void __init setup_processor(void)
|
||||
#endif
|
||||
|
||||
pr_info("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
|
||||
cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
|
||||
list->cpu_name, midr, midr & 15,
|
||||
proc_arch[cpu_architecture()], get_cr());
|
||||
|
||||
snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
|
||||
|
@ -42,6 +42,7 @@
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/procinfo.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/tlbflush.h>
|
||||
@ -102,6 +103,30 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
|
||||
#endif
|
||||
}
|
||||
|
||||
#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
static int secondary_biglittle_prepare(unsigned int cpu)
|
||||
{
|
||||
if (!cpu_vtable[cpu])
|
||||
cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
|
||||
|
||||
return cpu_vtable[cpu] ? 0 : -ENOMEM;
|
||||
}
|
||||
|
||||
static void secondary_biglittle_init(void)
|
||||
{
|
||||
init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
|
||||
}
|
||||
#else
|
||||
static int secondary_biglittle_prepare(unsigned int cpu)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void secondary_biglittle_init(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
int ret;
|
||||
@ -109,6 +134,10 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||
if (!smp_ops.smp_boot_secondary)
|
||||
return -ENOSYS;
|
||||
|
||||
ret = secondary_biglittle_prepare(cpu);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* We need to tell the secondary core where to find
|
||||
* its stack and the page tables.
|
||||
@ -359,6 +388,8 @@ asmlinkage void secondary_start_kernel(void)
|
||||
struct mm_struct *mm = &init_mm;
|
||||
unsigned int cpu;
|
||||
|
||||
secondary_biglittle_init();
|
||||
|
||||
/*
|
||||
* The identity mapping is uncached (strongly ordered), so
|
||||
* switch away from it before attempting any exclusive accesses.
|
||||
|
@ -759,7 +759,9 @@ static struct davinci_id da830_ids[] = {
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data da830_gpio_platform_data = {
|
||||
.ngpio = 128,
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 128,
|
||||
};
|
||||
|
||||
int __init da830_register_gpio(void)
|
||||
|
@ -719,7 +719,9 @@ int __init da850_register_vpif_capture(struct vpif_capture_config
|
||||
}
|
||||
|
||||
static struct davinci_gpio_platform_data da850_gpio_platform_data = {
|
||||
.ngpio = 144,
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 144,
|
||||
};
|
||||
|
||||
int __init da850_register_gpio(void)
|
||||
|
@ -701,6 +701,46 @@ static struct resource da8xx_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DA8XX_GPIO0,
|
||||
.end = IRQ_DA8XX_GPIO0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO1,
|
||||
.end = IRQ_DA8XX_GPIO1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO2,
|
||||
.end = IRQ_DA8XX_GPIO2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO3,
|
||||
.end = IRQ_DA8XX_GPIO3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO4,
|
||||
.end = IRQ_DA8XX_GPIO4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO5,
|
||||
.end = IRQ_DA8XX_GPIO5,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO6,
|
||||
.end = IRQ_DA8XX_GPIO6,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO7,
|
||||
.end = IRQ_DA8XX_GPIO7,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO8,
|
||||
.end = IRQ_DA8XX_GPIO8,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
|
@ -548,12 +548,44 @@ static struct resource dm355_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DM355_GPIOBNK0,
|
||||
.end = IRQ_DM355_GPIOBNK0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK1,
|
||||
.end = IRQ_DM355_GPIOBNK1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK2,
|
||||
.end = IRQ_DM355_GPIOBNK2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK3,
|
||||
.end = IRQ_DM355_GPIOBNK3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK4,
|
||||
.end = IRQ_DM355_GPIOBNK4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK5,
|
||||
.end = IRQ_DM355_GPIOBNK5,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK6,
|
||||
.end = IRQ_DM355_GPIOBNK6,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 104,
|
||||
};
|
||||
|
||||
|
@ -267,12 +267,49 @@ static struct resource dm365_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DM365_GPIO0,
|
||||
.end = IRQ_DM365_GPIO0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO1,
|
||||
.end = IRQ_DM365_GPIO1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO2,
|
||||
.end = IRQ_DM365_GPIO2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO3,
|
||||
.end = IRQ_DM365_GPIO3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO4,
|
||||
.end = IRQ_DM365_GPIO4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO5,
|
||||
.end = IRQ_DM365_GPIO5,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO6,
|
||||
.end = IRQ_DM365_GPIO6,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO7,
|
||||
.end = IRQ_DM365_GPIO7,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 104,
|
||||
.gpio_unbanked = 8,
|
||||
};
|
||||
|
@ -492,12 +492,34 @@ static struct resource dm644_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_GPIOBNK0,
|
||||
.end = IRQ_GPIOBNK0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK1,
|
||||
.end = IRQ_GPIOBNK1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK2,
|
||||
.end = IRQ_GPIOBNK2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK3,
|
||||
.end = IRQ_GPIOBNK3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK4,
|
||||
.end = IRQ_GPIOBNK4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 71,
|
||||
};
|
||||
|
||||
|
@ -442,12 +442,24 @@ static struct resource dm646x_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DM646X_GPIOBNK0,
|
||||
.end = IRQ_DM646X_GPIOBNK0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM646X_GPIOBNK1,
|
||||
.end = IRQ_DM646X_GPIOBNK1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM646X_GPIOBNK2,
|
||||
.end = IRQ_DM646X_GPIOBNK2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 43,
|
||||
};
|
||||
|
||||
|
@ -750,6 +750,9 @@ static void modem_pm(struct uart_port *port, unsigned int state, unsigned old)
|
||||
struct modem_private_data *priv = port->private_data;
|
||||
int ret;
|
||||
|
||||
if (!priv)
|
||||
return;
|
||||
|
||||
if (IS_ERR(priv->regulator))
|
||||
return;
|
||||
|
||||
|
@ -209,11 +209,61 @@ static int __init omapdss_init_fbdev(void)
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static inline int omapdss_init_fbdev(void)
|
||||
|
||||
static const char * const omapdss_compat_names[] __initconst = {
|
||||
"ti,omap2-dss",
|
||||
"ti,omap3-dss",
|
||||
"ti,omap4-dss",
|
||||
"ti,omap5-dss",
|
||||
"ti,dra7-dss",
|
||||
};
|
||||
|
||||
static struct device_node * __init omapdss_find_dss_of_node(void)
|
||||
{
|
||||
return 0;
|
||||
struct device_node *node;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(omapdss_compat_names); ++i) {
|
||||
node = of_find_compatible_node(NULL, NULL,
|
||||
omapdss_compat_names[i]);
|
||||
if (node)
|
||||
return node;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int __init omapdss_init_of(void)
|
||||
{
|
||||
int r;
|
||||
struct device_node *node;
|
||||
struct platform_device *pdev;
|
||||
|
||||
/* only create dss helper devices if dss is enabled in the .dts */
|
||||
|
||||
node = omapdss_find_dss_of_node();
|
||||
if (!node)
|
||||
return 0;
|
||||
|
||||
if (!of_device_is_available(node))
|
||||
return 0;
|
||||
|
||||
pdev = of_find_device_by_node(node);
|
||||
|
||||
if (!pdev) {
|
||||
pr_err("Unable to find DSS platform device\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
r = of_platform_populate(node, NULL, NULL, &pdev->dev);
|
||||
if (r) {
|
||||
pr_err("Unable to populate DSS submodule devices\n");
|
||||
return r;
|
||||
}
|
||||
|
||||
return omapdss_init_fbdev();
|
||||
}
|
||||
omap_device_initcall(omapdss_init_of);
|
||||
#endif /* CONFIG_FB_OMAP2 */
|
||||
|
||||
static void dispc_disable_outputs(void)
|
||||
@ -361,58 +411,3 @@ int omap_dss_reset(struct omap_hwmod *oh)
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
static const char * const omapdss_compat_names[] __initconst = {
|
||||
"ti,omap2-dss",
|
||||
"ti,omap3-dss",
|
||||
"ti,omap4-dss",
|
||||
"ti,omap5-dss",
|
||||
"ti,dra7-dss",
|
||||
};
|
||||
|
||||
static struct device_node * __init omapdss_find_dss_of_node(void)
|
||||
{
|
||||
struct device_node *node;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(omapdss_compat_names); ++i) {
|
||||
node = of_find_compatible_node(NULL, NULL,
|
||||
omapdss_compat_names[i]);
|
||||
if (node)
|
||||
return node;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int __init omapdss_init_of(void)
|
||||
{
|
||||
int r;
|
||||
struct device_node *node;
|
||||
struct platform_device *pdev;
|
||||
|
||||
/* only create dss helper devices if dss is enabled in the .dts */
|
||||
|
||||
node = omapdss_find_dss_of_node();
|
||||
if (!node)
|
||||
return 0;
|
||||
|
||||
if (!of_device_is_available(node))
|
||||
return 0;
|
||||
|
||||
pdev = of_find_device_by_node(node);
|
||||
|
||||
if (!pdev) {
|
||||
pr_err("Unable to find DSS platform device\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
r = of_platform_populate(node, NULL, NULL, &pdev->dev);
|
||||
if (r) {
|
||||
pr_err("Unable to populate DSS submodule devices\n");
|
||||
return r;
|
||||
}
|
||||
|
||||
return omapdss_init_fbdev();
|
||||
}
|
||||
omap_device_initcall(omapdss_init_of);
|
||||
|
@ -351,7 +351,7 @@ static void omap44xx_prm_reconfigure_io_chain(void)
|
||||
* to occur, WAKEUPENABLE bits must be set in the pad mux registers, and
|
||||
* omap44xx_prm_reconfigure_io_chain() must be called. No return value.
|
||||
*/
|
||||
static void __init omap44xx_prm_enable_io_wakeup(void)
|
||||
static void omap44xx_prm_enable_io_wakeup(void)
|
||||
{
|
||||
s32 inst = omap4_prmst_get_prm_dev_inst();
|
||||
|
||||
|
@ -52,8 +52,6 @@ static void cpu_v7_spectre_init(void)
|
||||
case ARM_CPU_PART_CORTEX_A17:
|
||||
case ARM_CPU_PART_CORTEX_A73:
|
||||
case ARM_CPU_PART_CORTEX_A75:
|
||||
if (processor.switch_mm != cpu_v7_bpiall_switch_mm)
|
||||
goto bl_error;
|
||||
per_cpu(harden_branch_predictor_fn, cpu) =
|
||||
harden_branch_predictor_bpiall;
|
||||
spectre_v2_method = "BPIALL";
|
||||
@ -61,8 +59,6 @@ static void cpu_v7_spectre_init(void)
|
||||
|
||||
case ARM_CPU_PART_CORTEX_A15:
|
||||
case ARM_CPU_PART_BRAHMA_B15:
|
||||
if (processor.switch_mm != cpu_v7_iciallu_switch_mm)
|
||||
goto bl_error;
|
||||
per_cpu(harden_branch_predictor_fn, cpu) =
|
||||
harden_branch_predictor_iciallu;
|
||||
spectre_v2_method = "ICIALLU";
|
||||
@ -88,11 +84,9 @@ static void cpu_v7_spectre_init(void)
|
||||
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
|
||||
if ((int)res.a0 != 0)
|
||||
break;
|
||||
if (processor.switch_mm != cpu_v7_hvc_switch_mm && cpu)
|
||||
goto bl_error;
|
||||
per_cpu(harden_branch_predictor_fn, cpu) =
|
||||
call_hvc_arch_workaround_1;
|
||||
processor.switch_mm = cpu_v7_hvc_switch_mm;
|
||||
cpu_do_switch_mm = cpu_v7_hvc_switch_mm;
|
||||
spectre_v2_method = "hypervisor";
|
||||
break;
|
||||
|
||||
@ -101,11 +95,9 @@ static void cpu_v7_spectre_init(void)
|
||||
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
|
||||
if ((int)res.a0 != 0)
|
||||
break;
|
||||
if (processor.switch_mm != cpu_v7_smc_switch_mm && cpu)
|
||||
goto bl_error;
|
||||
per_cpu(harden_branch_predictor_fn, cpu) =
|
||||
call_smc_arch_workaround_1;
|
||||
processor.switch_mm = cpu_v7_smc_switch_mm;
|
||||
cpu_do_switch_mm = cpu_v7_smc_switch_mm;
|
||||
spectre_v2_method = "firmware";
|
||||
break;
|
||||
|
||||
@ -119,11 +111,6 @@ static void cpu_v7_spectre_init(void)
|
||||
if (spectre_v2_method)
|
||||
pr_info("CPU%u: Spectre v2: using %s workaround\n",
|
||||
smp_processor_id(), spectre_v2_method);
|
||||
return;
|
||||
|
||||
bl_error:
|
||||
pr_err("CPU%u: Spectre v2: incorrect context switching function, system vulnerable\n",
|
||||
cpu);
|
||||
}
|
||||
#else
|
||||
static void cpu_v7_spectre_init(void)
|
||||
|
@ -112,7 +112,7 @@ ENTRY(cpu_v7_hvc_switch_mm)
|
||||
hvc #0
|
||||
ldmfd sp!, {r0 - r3}
|
||||
b cpu_v7_switch_mm
|
||||
ENDPROC(cpu_v7_smc_switch_mm)
|
||||
ENDPROC(cpu_v7_hvc_switch_mm)
|
||||
#endif
|
||||
ENTRY(cpu_v7_iciallu_switch_mm)
|
||||
mov r3, #0
|
||||
|
@ -573,7 +573,7 @@ int vfp_preserve_user_clear_hwstate(struct user_vfp *ufp,
|
||||
*/
|
||||
ufp_exc->fpexc = hwstate->fpexc;
|
||||
ufp_exc->fpinst = hwstate->fpinst;
|
||||
ufp_exc->fpinst2 = ufp_exc->fpinst2;
|
||||
ufp_exc->fpinst2 = hwstate->fpinst2;
|
||||
|
||||
/* Ensure that VFP is disabled. */
|
||||
vfp_flush_hwstate(thread);
|
||||
|
@ -497,6 +497,24 @@ config ARM64_ERRATUM_1188873
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config ARM64_ERRATUM_1286807
|
||||
bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation"
|
||||
default y
|
||||
select ARM64_WORKAROUND_REPEAT_TLBI
|
||||
help
|
||||
This option adds workaround for ARM Cortex-A76 erratum 1286807
|
||||
|
||||
On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
|
||||
address for a cacheable mapping of a location is being
|
||||
accessed by a core while another core is remapping the virtual
|
||||
address to a new physical page using the recommended
|
||||
break-before-make sequence, then under very rare circumstances
|
||||
TLBI+DSB completes before a read using the translation being
|
||||
invalidated has been observed by other observers. The
|
||||
workaround repeats the TLBI+DSB operation.
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config CAVIUM_ERRATUM_22375
|
||||
bool "Cavium erratum 22375, 24313"
|
||||
default y
|
||||
@ -566,9 +584,16 @@ config QCOM_FALKOR_ERRATUM_1003
|
||||
is unchanged. Work around the erratum by invalidating the walk cache
|
||||
entries for the trampoline before entering the kernel proper.
|
||||
|
||||
config ARM64_WORKAROUND_REPEAT_TLBI
|
||||
bool
|
||||
help
|
||||
Enable the repeat TLBI workaround for Falkor erratum 1009 and
|
||||
Cortex-A76 erratum 1286807.
|
||||
|
||||
config QCOM_FALKOR_ERRATUM_1009
|
||||
bool "Falkor E1009: Prematurely complete a DSB after a TLBI"
|
||||
default y
|
||||
select ARM64_WORKAROUND_REPEAT_TLBI
|
||||
help
|
||||
On Falkor v1, the CPU may prematurely complete a DSB following a
|
||||
TLBI xxIS invalidate maintenance operation. Repeat the TLBI operation
|
||||
|
@ -139,6 +139,7 @@
|
||||
clock-names = "stmmaceth";
|
||||
tx-fifo-depth = <16384>;
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -154,6 +155,7 @@
|
||||
clock-names = "stmmaceth";
|
||||
tx-fifo-depth = <16384>;
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -169,6 +171,7 @@
|
||||
clock-names = "stmmaceth";
|
||||
tx-fifo-depth = <16384>;
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -241,3 +241,7 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <0 4>, <81 4>;
|
||||
};
|
||||
|
@ -352,6 +352,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <0 4>, <81 4>;
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -652,7 +652,7 @@
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
|
||||
<&dmac2 0x35>, <&dmac2 0x34>;
|
||||
dma-names = "tx", "rx";
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 518>;
|
||||
status = "disabled";
|
||||
|
@ -15,7 +15,7 @@
|
||||
|
||||
aliases {
|
||||
serial0 = &scif0;
|
||||
ethernet0 = &avb;
|
||||
ethernet0 = &gether;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@ -97,23 +97,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
&avb {
|
||||
pinctrl-0 = <&avb_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&phy0>;
|
||||
renesas,no-ether-link;
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <1500>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&canfd {
|
||||
pinctrl-0 = <&canfd0_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -139,6 +122,23 @@
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
&gether {
|
||||
pinctrl-0 = <&gether_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&phy0>;
|
||||
renesas,no-ether-link;
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <1500>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -236,16 +236,17 @@
|
||||
};
|
||||
|
||||
&pfc {
|
||||
avb_pins: avb {
|
||||
groups = "avb_mdio", "avb_rgmii";
|
||||
function = "avb";
|
||||
};
|
||||
|
||||
canfd0_pins: canfd0 {
|
||||
groups = "canfd0_data_a";
|
||||
function = "canfd0";
|
||||
};
|
||||
|
||||
gether_pins: gether {
|
||||
groups = "gether_mdio_a", "gether_rgmii",
|
||||
"gether_txcrefclk", "gether_txcrefclk_mega";
|
||||
function = "gether";
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0 {
|
||||
groups = "i2c0";
|
||||
function = "i2c0";
|
||||
|
@ -153,7 +153,7 @@
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
|
||||
ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
||||
|
@ -57,18 +57,6 @@
|
||||
regulator-always-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
};
|
||||
|
||||
vdd_log: vdd-log {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm2 0 25000 0>;
|
||||
regulator-name = "vdd_log";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&cpu_l0 {
|
||||
|
@ -36,7 +36,7 @@
|
||||
|
||||
wkup_uart0: serial@42300000 {
|
||||
compatible = "ti,am654-uart";
|
||||
reg = <0x00 0x42300000 0x00 0x100>;
|
||||
reg = <0x42300000 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -56,6 +56,19 @@ static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs)
|
||||
{
|
||||
return is_compat_task();
|
||||
}
|
||||
|
||||
#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
|
||||
|
||||
static inline bool arch_syscall_match_sym_name(const char *sym,
|
||||
const char *name)
|
||||
{
|
||||
/*
|
||||
* Since all syscall functions have __arm64_ prefix, we must skip it.
|
||||
* However, as we described above, we decided to ignore compat
|
||||
* syscalls, so we don't care about __arm64_compat_ prefix here.
|
||||
*/
|
||||
return !strcmp(sym + 8, name);
|
||||
}
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_FTRACE_H */
|
||||
|
@ -24,6 +24,14 @@
|
||||
#define KERNEL_DS UL(-1)
|
||||
#define USER_DS (TASK_SIZE_64 - 1)
|
||||
|
||||
/*
|
||||
* On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
|
||||
* no point in shifting all network buffers by 2 bytes just to make some IP
|
||||
* header fields appear aligned in memory, potentially sacrificing some DMA
|
||||
* performance on some platforms.
|
||||
*/
|
||||
#define NET_IP_ALIGN 0
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
@ -468,7 +468,7 @@
|
||||
SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_WXN | \
|
||||
SCTLR_ELx_DSSBS | ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0)
|
||||
|
||||
#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffff
|
||||
#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffffUL
|
||||
#error "Inconsistent SCTLR_EL2 set/clear bits"
|
||||
#endif
|
||||
|
||||
@ -509,7 +509,7 @@
|
||||
SCTLR_EL1_UMA | SCTLR_ELx_WXN | ENDIAN_CLEAR_EL1 |\
|
||||
SCTLR_ELx_DSSBS | SCTLR_EL1_NTWI | SCTLR_EL1_RES0)
|
||||
|
||||
#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffff
|
||||
#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffffUL
|
||||
#error "Inconsistent SCTLR_EL1 set/clear bits"
|
||||
#endif
|
||||
|
||||
|
@ -41,14 +41,14 @@
|
||||
ALTERNATIVE("nop\n nop", \
|
||||
"dsb ish\n tlbi " #op, \
|
||||
ARM64_WORKAROUND_REPEAT_TLBI, \
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009) \
|
||||
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
|
||||
: : )
|
||||
|
||||
#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \
|
||||
ALTERNATIVE("nop\n nop", \
|
||||
"dsb ish\n tlbi " #op ", %0", \
|
||||
ARM64_WORKAROUND_REPEAT_TLBI, \
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009) \
|
||||
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
|
||||
: : "r" (arg))
|
||||
|
||||
#define __TLBI_N(op, arg, n, ...) __TLBI_##n(op, arg)
|
||||
|
@ -570,6 +570,20 @@ static const struct midr_range arm64_harden_el2_vectors[] = {
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
|
||||
|
||||
static const struct midr_range arm64_repeat_tlbi_cpus[] = {
|
||||
#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
|
||||
MIDR_RANGE(MIDR_QCOM_FALKOR_V1, 0, 0, 0, 0),
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_1286807
|
||||
MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
|
||||
#endif
|
||||
{},
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
#if defined(CONFIG_ARM64_ERRATUM_826319) || \
|
||||
defined(CONFIG_ARM64_ERRATUM_827319) || \
|
||||
@ -695,11 +709,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
.matches = is_kryo_midr,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
|
||||
{
|
||||
.desc = "Qualcomm Technologies Falkor erratum 1009",
|
||||
.desc = "Qualcomm erratum 1009, ARM erratum 1286807",
|
||||
.capability = ARM64_WORKAROUND_REPEAT_TLBI,
|
||||
ERRATA_MIDR_REV(MIDR_QCOM_FALKOR_V1, 0, 0),
|
||||
ERRATA_MIDR_RANGE_LIST(arm64_repeat_tlbi_cpus),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_858921
|
||||
|
@ -1333,7 +1333,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
|
||||
.cpu_enable = cpu_enable_hw_dbm,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_SSBD
|
||||
{
|
||||
.desc = "CRC32 instructions",
|
||||
.capability = ARM64_HAS_CRC32,
|
||||
@ -1343,6 +1342,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
|
||||
.field_pos = ID_AA64ISAR0_CRC32_SHIFT,
|
||||
.min_field_value = 1,
|
||||
},
|
||||
#ifdef CONFIG_ARM64_SSBD
|
||||
{
|
||||
.desc = "Speculative Store Bypassing Safe (SSBS)",
|
||||
.capability = ARM64_SSBS,
|
||||
|
@ -216,8 +216,6 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long)&return_to_handler;
|
||||
unsigned long old;
|
||||
struct ftrace_graph_ent trace;
|
||||
int err;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return;
|
||||
@ -229,18 +227,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
*/
|
||||
old = *parent;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
return;
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
frame_pointer, NULL);
|
||||
if (err == -EBUSY)
|
||||
return;
|
||||
else
|
||||
if (!function_graph_enter(old, self_addr, frame_pointer, NULL))
|
||||
*parent = return_hooker;
|
||||
}
|
||||
|
||||
|
@ -313,6 +313,7 @@ void __init setup_arch(char **cmdline_p)
|
||||
arm64_memblock_init();
|
||||
|
||||
paging_init();
|
||||
efi_apply_persistent_mem_reservations();
|
||||
|
||||
acpi_table_upgrade();
|
||||
|
||||
|
@ -483,8 +483,6 @@ void __init arm64_memblock_init(void)
|
||||
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
|
||||
|
||||
dma_contiguous_reserve(arm64_dma_phys_limit);
|
||||
|
||||
memblock_allow_resize();
|
||||
}
|
||||
|
||||
void __init bootmem_init(void)
|
||||
|
@ -659,6 +659,8 @@ void __init paging_init(void)
|
||||
|
||||
memblock_free(__pa_symbol(init_pg_dir),
|
||||
__pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir));
|
||||
|
||||
memblock_allow_resize();
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -351,7 +351,8 @@ static void build_epilogue(struct jit_ctx *ctx)
|
||||
* >0 - successfully JITed a 16-byte eBPF instruction.
|
||||
* <0 - failed to JIT.
|
||||
*/
|
||||
static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
|
||||
bool extra_pass)
|
||||
{
|
||||
const u8 code = insn->code;
|
||||
const u8 dst = bpf2a64[insn->dst_reg];
|
||||
@ -625,12 +626,19 @@ emit_cond_jmp:
|
||||
case BPF_JMP | BPF_CALL:
|
||||
{
|
||||
const u8 r0 = bpf2a64[BPF_REG_0];
|
||||
const u64 func = (u64)__bpf_call_base + imm;
|
||||
bool func_addr_fixed;
|
||||
u64 func_addr;
|
||||
int ret;
|
||||
|
||||
if (ctx->prog->is_func)
|
||||
emit_addr_mov_i64(tmp, func, ctx);
|
||||
ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
|
||||
&func_addr, &func_addr_fixed);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (func_addr_fixed)
|
||||
/* We can use optimized emission here. */
|
||||
emit_a64_mov_i64(tmp, func_addr, ctx);
|
||||
else
|
||||
emit_a64_mov_i64(tmp, func, ctx);
|
||||
emit_addr_mov_i64(tmp, func_addr, ctx);
|
||||
emit(A64_BLR(tmp), ctx);
|
||||
emit(A64_MOV(1, r0, A64_R(0)), ctx);
|
||||
break;
|
||||
@ -753,7 +761,7 @@ emit_cond_jmp:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int build_body(struct jit_ctx *ctx)
|
||||
static int build_body(struct jit_ctx *ctx, bool extra_pass)
|
||||
{
|
||||
const struct bpf_prog *prog = ctx->prog;
|
||||
int i;
|
||||
@ -762,7 +770,7 @@ static int build_body(struct jit_ctx *ctx)
|
||||
const struct bpf_insn *insn = &prog->insnsi[i];
|
||||
int ret;
|
||||
|
||||
ret = build_insn(insn, ctx);
|
||||
ret = build_insn(insn, ctx, extra_pass);
|
||||
if (ret > 0) {
|
||||
i++;
|
||||
if (ctx->image == NULL)
|
||||
@ -858,7 +866,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
/* 1. Initial fake pass to compute ctx->idx. */
|
||||
|
||||
/* Fake pass to fill in ctx->offset. */
|
||||
if (build_body(&ctx)) {
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
@ -888,7 +896,7 @@ skip_init_ctx:
|
||||
|
||||
build_prologue(&ctx, was_classic);
|
||||
|
||||
if (build_body(&ctx)) {
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
|
@ -59,7 +59,9 @@ extern struct node_cpuid_s node_cpuid[NR_CPUS];
|
||||
*/
|
||||
|
||||
extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
|
||||
#define node_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)])
|
||||
#define slit_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)])
|
||||
extern int __node_distance(int from, int to);
|
||||
#define node_distance(from,to) __node_distance(from, to)
|
||||
|
||||
extern int paddr_to_nid(unsigned long paddr);
|
||||
|
||||
|
@ -578,8 +578,8 @@ void __init acpi_numa_fixup(void)
|
||||
if (!slit_table) {
|
||||
for (i = 0; i < MAX_NUMNODES; i++)
|
||||
for (j = 0; j < MAX_NUMNODES; j++)
|
||||
node_distance(i, j) = i == j ? LOCAL_DISTANCE :
|
||||
REMOTE_DISTANCE;
|
||||
slit_distance(i, j) = i == j ?
|
||||
LOCAL_DISTANCE : REMOTE_DISTANCE;
|
||||
return;
|
||||
}
|
||||
|
||||
@ -592,7 +592,7 @@ void __init acpi_numa_fixup(void)
|
||||
if (!pxm_bit_test(j))
|
||||
continue;
|
||||
node_to = pxm_to_node(j);
|
||||
node_distance(node_from, node_to) =
|
||||
slit_distance(node_from, node_to) =
|
||||
slit_table->entry[i * slit_table->locality_count + j];
|
||||
}
|
||||
}
|
||||
|
@ -36,6 +36,12 @@ struct node_cpuid_s node_cpuid[NR_CPUS] =
|
||||
*/
|
||||
u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
|
||||
|
||||
int __node_distance(int from, int to)
|
||||
{
|
||||
return slit_distance(from, to);
|
||||
}
|
||||
EXPORT_SYMBOL(__node_distance);
|
||||
|
||||
/* Identify which cnode a physical address resides on */
|
||||
int
|
||||
paddr_to_nid(unsigned long paddr)
|
||||
|
@ -55,12 +55,12 @@
|
||||
*/
|
||||
#ifdef CONFIG_SUN3
|
||||
#define PTRS_PER_PTE 16
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
#define PTRS_PER_PMD 1
|
||||
#define PTRS_PER_PGD 2048
|
||||
#elif defined(CONFIG_COLDFIRE)
|
||||
#define PTRS_PER_PTE 512
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
#define PTRS_PER_PMD 1
|
||||
#define PTRS_PER_PGD 1024
|
||||
#else
|
||||
|
@ -63,7 +63,7 @@ extern int mem_init_done;
|
||||
|
||||
#include <asm-generic/4level-fixup.h>
|
||||
|
||||
#define __PAGETABLE_PMD_FOLDED
|
||||
#define __PAGETABLE_PMD_FOLDED 1
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASSEMBLY__
|
||||
|
@ -22,8 +22,7 @@
|
||||
void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
||||
{
|
||||
unsigned long old;
|
||||
int faulted, err;
|
||||
struct ftrace_graph_ent trace;
|
||||
int faulted;
|
||||
unsigned long return_hooker = (unsigned long)
|
||||
&return_to_handler;
|
||||
|
||||
@ -63,18 +62,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
||||
return;
|
||||
}
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0, NULL);
|
||||
if (err == -EBUSY) {
|
||||
if (function_graph_enter(old, self_addr, 0, NULL))
|
||||
*parent = old;
|
||||
return;
|
||||
}
|
||||
|
||||
trace.func = self_addr;
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
current->curr_ret_stack--;
|
||||
*parent = old;
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
|
||||
|
||||
|
@ -67,7 +67,7 @@ void (*cvmx_override_pko_queue_priority) (int pko_port,
|
||||
void (*cvmx_override_ipd_port_setup) (int ipd_port);
|
||||
|
||||
/* Port count per interface */
|
||||
static int interface_port_count[5];
|
||||
static int interface_port_count[9];
|
||||
|
||||
/**
|
||||
* Return the number of interfaces the chip has. Each interface
|
||||
|
@ -140,6 +140,7 @@ CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_DS1307=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_OCTEON_ETHERNET=y
|
||||
CONFIG_OCTEON_USB=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_RAS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
|
@ -73,7 +73,7 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg,
|
||||
#ifdef CONFIG_64BIT
|
||||
case 4: case 5: case 6: case 7:
|
||||
#ifdef CONFIG_MIPS32_O32
|
||||
if (test_thread_flag(TIF_32BIT_REGS))
|
||||
if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
|
||||
return get_user(*arg, (int *)usp + n);
|
||||
else
|
||||
#endif
|
||||
|
@ -322,7 +322,6 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
|
||||
unsigned long fp)
|
||||
{
|
||||
unsigned long old_parent_ra;
|
||||
struct ftrace_graph_ent trace;
|
||||
unsigned long return_hooker = (unsigned long)
|
||||
&return_to_handler;
|
||||
int faulted, insns;
|
||||
@ -369,12 +368,6 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
|
||||
if (unlikely(faulted))
|
||||
goto out;
|
||||
|
||||
if (ftrace_push_return_trace(old_parent_ra, self_ra, &trace.depth, fp,
|
||||
NULL) == -EBUSY) {
|
||||
*parent_ra_addr = old_parent_ra;
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Get the recorded ip of the current mcount calling site in the
|
||||
* __mcount_loc section, which will be used to filter the function
|
||||
@ -382,13 +375,10 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
|
||||
*/
|
||||
|
||||
insns = core_kernel_text(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1;
|
||||
trace.func = self_ra - (MCOUNT_INSN_SIZE * insns);
|
||||
self_ra -= (MCOUNT_INSN_SIZE * insns);
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
current->curr_ret_stack--;
|
||||
if (function_graph_enter(old_parent_ra, self_ra, fp, NULL))
|
||||
*parent_ra_addr = old_parent_ra;
|
||||
}
|
||||
return;
|
||||
out:
|
||||
ftrace_graph_stop();
|
||||
|
@ -794,6 +794,7 @@ static void __init arch_mem_init(char **cmdline_p)
|
||||
|
||||
/* call board setup routine */
|
||||
plat_mem_setup();
|
||||
memblock_set_bottom_up(true);
|
||||
|
||||
/*
|
||||
* Make sure all kernel memory is in the maps. The "UP" and
|
||||
|
@ -2260,10 +2260,8 @@ void __init trap_init(void)
|
||||
unsigned long size = 0x200 + VECTORSPACING*64;
|
||||
phys_addr_t ebase_pa;
|
||||
|
||||
memblock_set_bottom_up(true);
|
||||
ebase = (unsigned long)
|
||||
memblock_alloc_from(size, 1 << fls(size), 0);
|
||||
memblock_set_bottom_up(false);
|
||||
|
||||
/*
|
||||
* Try to ensure ebase resides in KSeg0 if possible.
|
||||
@ -2307,6 +2305,7 @@ void __init trap_init(void)
|
||||
if (board_ebase_setup)
|
||||
board_ebase_setup();
|
||||
per_cpu_trap_init(true);
|
||||
memblock_set_bottom_up(false);
|
||||
|
||||
/*
|
||||
* Copy the generic exception handlers to their final destination.
|
||||
|
@ -231,6 +231,8 @@ static __init void prom_meminit(void)
|
||||
cpumask_clear(&__node_data[(node)]->cpumask);
|
||||
}
|
||||
}
|
||||
max_low_pfn = PHYS_PFN(memblock_end_of_DRAM());
|
||||
|
||||
for (cpu = 0; cpu < loongson_sysconf.nr_cpus; cpu++) {
|
||||
node = cpu / loongson_sysconf.cores_per_node;
|
||||
if (node >= num_online_nodes())
|
||||
@ -248,19 +250,9 @@ static __init void prom_meminit(void)
|
||||
|
||||
void __init paging_init(void)
|
||||
{
|
||||
unsigned node;
|
||||
unsigned long zones_size[MAX_NR_ZONES] = {0, };
|
||||
|
||||
pagetable_init();
|
||||
|
||||
for_each_online_node(node) {
|
||||
unsigned long start_pfn, end_pfn;
|
||||
|
||||
get_pfn_range_for_nid(node, &start_pfn, &end_pfn);
|
||||
|
||||
if (end_pfn > max_low_pfn)
|
||||
max_low_pfn = end_pfn;
|
||||
}
|
||||
#ifdef CONFIG_ZONE_DMA32
|
||||
zones_size[ZONE_DMA32] = MAX_DMA32_PFN;
|
||||
#endif
|
||||
|
@ -50,7 +50,7 @@ void *arch_dma_alloc(struct device *dev, size_t size,
|
||||
void *ret;
|
||||
|
||||
ret = dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
|
||||
if (!ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
|
||||
if (ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
|
||||
dma_cache_wback_inv((unsigned long) ret, size);
|
||||
ret = (void *)UNCAC_ADDR(ret);
|
||||
}
|
||||
|
@ -84,7 +84,7 @@ static struct rt2880_pmx_func pcie_rst_grp[] = {
|
||||
};
|
||||
static struct rt2880_pmx_func nd_sd_grp[] = {
|
||||
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
|
||||
FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
|
||||
FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
|
||||
};
|
||||
|
||||
static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
|
||||
|
@ -435,6 +435,7 @@ void __init prom_meminit(void)
|
||||
|
||||
mlreset();
|
||||
szmem();
|
||||
max_low_pfn = PHYS_PFN(memblock_end_of_DRAM());
|
||||
|
||||
for (node = 0; node < MAX_COMPACT_NODES; node++) {
|
||||
if (node_online(node)) {
|
||||
@ -455,18 +456,8 @@ extern void setup_zero_pages(void);
|
||||
void __init paging_init(void)
|
||||
{
|
||||
unsigned long zones_size[MAX_NR_ZONES] = {0, };
|
||||
unsigned node;
|
||||
|
||||
pagetable_init();
|
||||
|
||||
for_each_online_node(node) {
|
||||
unsigned long start_pfn, end_pfn;
|
||||
|
||||
get_pfn_range_for_nid(node, &start_pfn, &end_pfn);
|
||||
|
||||
if (end_pfn > max_low_pfn)
|
||||
max_low_pfn = end_pfn;
|
||||
}
|
||||
zones_size[ZONE_NORMAL] = max_low_pfn;
|
||||
free_area_init_nodes(zones_size);
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user