irq: change ->set_affinity() to return status
according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
parent
fcef5911c7
commit
d5dedd4507
@ -176,22 +176,26 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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}
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}
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static void
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static int
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dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&dp264_irq_lock);
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cpu_set_irq_affinity(irq, *affinity);
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tsunami_update_irq_hw(cached_irq_mask);
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spin_unlock(&dp264_irq_lock);
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return 0;
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}
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static void
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static int
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clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&dp264_irq_lock);
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cpu_set_irq_affinity(irq - 16, *affinity);
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tsunami_update_irq_hw(cached_irq_mask);
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spin_unlock(&dp264_irq_lock);
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return 0;
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}
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static struct hw_interrupt_type dp264_irq_type = {
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@ -157,13 +157,15 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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}
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static void
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static int
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titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&titan_irq_lock);
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titan_cpu_set_irq_affinity(irq - 16, *affinity);
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titan_update_irq_hw(titan_cached_irq_mask);
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spin_unlock(&titan_irq_lock);
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return 0;
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}
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static void
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@ -109,7 +109,7 @@ static void gic_unmask_irq(unsigned int irq)
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}
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#ifdef CONFIG_SMP
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static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
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static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
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{
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void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
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unsigned int shift = (irq % 4) * 8;
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@ -122,6 +122,8 @@ static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
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val |= 1 << (cpu + shift);
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writel(val, reg);
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spin_unlock(&irq_controller_lock);
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return 0;
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}
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#endif
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@ -325,12 +325,14 @@ static void end_crisv32_irq(unsigned int irq)
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{
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}
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void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
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int set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
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{
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unsigned long flags;
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spin_lock_irqsave(&irq_lock, flags);
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irq_allocations[irq - FIRST_IRQ].mask = *dest;
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spin_unlock_irqrestore(&irq_lock, flags);
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return 0;
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}
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static struct irq_chip crisv32_irq_type = {
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@ -21,9 +21,10 @@ hpsim_irq_noop (unsigned int irq)
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{
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}
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static void
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static int
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hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b)
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{
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return 0;
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}
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static struct hw_interrupt_type irq_type_hp_sim = {
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@ -329,7 +329,7 @@ unmask_irq (unsigned int irq)
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}
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static void
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static int
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iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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#ifdef CONFIG_SMP
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@ -343,15 +343,15 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
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cpu = cpumask_first_and(cpu_online_mask, mask);
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if (cpu >= nr_cpu_ids)
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return;
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return -1;
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if (irq_prepare_move(irq, cpu))
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return;
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return -1;
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dest = cpu_physical_id(cpu);
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if (!iosapic_intr_info[irq].count)
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return; /* not an IOSAPIC interrupt */
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return -1; /* not an IOSAPIC interrupt */
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set_irq_affinity_info(irq, dest, redir);
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@ -376,7 +376,9 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
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iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32);
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iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
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}
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#endif
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return 0;
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}
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/*
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@ -12,7 +12,7 @@
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static struct irq_chip ia64_msi_chip;
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#ifdef CONFIG_SMP
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static void ia64_set_msi_irq_affinity(unsigned int irq,
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static int ia64_set_msi_irq_affinity(unsigned int irq,
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const cpumask_t *cpu_mask)
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{
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struct msi_msg msg;
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@ -20,10 +20,10 @@ static void ia64_set_msi_irq_affinity(unsigned int irq,
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int cpu = first_cpu(*cpu_mask);
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if (!cpu_online(cpu))
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return;
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return -1;
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if (irq_prepare_move(irq, cpu))
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return;
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return -1;
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read_msi_msg(irq, &msg);
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@ -39,6 +39,8 @@ static void ia64_set_msi_irq_affinity(unsigned int irq,
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write_msi_msg(irq, &msg);
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cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
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return 0;
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}
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#endif /* CONFIG_SMP */
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@ -130,17 +132,17 @@ void arch_teardown_msi_irq(unsigned int irq)
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_SMP
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static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
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static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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struct msi_msg msg;
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int cpu = cpumask_first(mask);
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if (!cpu_online(cpu))
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return;
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return -1;
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if (irq_prepare_move(irq, cpu))
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return;
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return -1;
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dmar_msi_read(irq, &msg);
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@ -151,6 +153,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
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dmar_msi_write(irq, &msg);
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cpumask_copy(irq_desc[irq].affinity, mask);
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return 0;
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}
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#endif /* CONFIG_SMP */
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@ -227,7 +227,7 @@ finish_up:
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return new_irq_info;
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}
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static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
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static int sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
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{
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struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
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nasid_t nasid;
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@ -239,6 +239,8 @@ static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
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list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
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sn_irq_lh[irq], list)
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(void)sn_retarget_vector(sn_irq_info, nasid, slice);
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return 0;
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}
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#ifdef CONFIG_SMP
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@ -151,7 +151,7 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
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}
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#ifdef CONFIG_SMP
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static void sn_set_msi_irq_affinity(unsigned int irq,
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static int sn_set_msi_irq_affinity(unsigned int irq,
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const struct cpumask *cpu_mask)
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{
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struct msi_msg msg;
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@ -168,7 +168,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq,
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cpu = cpumask_first(cpu_mask);
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sn_irq_info = sn_msi_info[irq].sn_irq_info;
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if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
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return;
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return -1;
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/*
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* Release XIO resources for the old MSI PCI address
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@ -189,7 +189,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq,
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new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
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sn_msi_info[irq].sn_irq_info = new_irq_info;
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if (new_irq_info == NULL)
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return;
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return -1;
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/*
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* Map the xio address into bus space
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@ -206,6 +206,8 @@ static void sn_set_msi_irq_affinity(unsigned int irq,
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write_msi_msg(irq, &msg);
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cpumask_copy(irq_desc[irq].affinity, cpu_mask);
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return 0;
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}
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#endif /* CONFIG_SMP */
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@ -177,7 +177,7 @@ static void octeon_irq_ciu0_disable(unsigned int irq)
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}
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#ifdef CONFIG_SMP
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static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest)
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static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest)
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{
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int cpu;
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int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */
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@ -199,6 +199,8 @@ static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask
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*/
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cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2));
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write_unlock(&octeon_irq_ciu0_rwlock);
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return 0;
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}
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#endif
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@ -292,7 +294,7 @@ static void octeon_irq_ciu1_disable(unsigned int irq)
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}
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#ifdef CONFIG_SMP
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static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest)
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static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest)
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{
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int cpu;
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int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */
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@ -315,6 +317,8 @@ static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask
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*/
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cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1));
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write_unlock(&octeon_irq_ciu1_rwlock);
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return 0;
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}
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#endif
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@ -49,7 +49,7 @@ static inline void smtc_im_ack_irq(unsigned int irq)
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#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
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#include <linux/cpumask.h>
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extern void plat_set_irq_affinity(unsigned int irq,
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extern int plat_set_irq_affinity(unsigned int irq,
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const struct cpumask *affinity);
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extern void smtc_forward_irq(unsigned int irq);
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@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq)
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static DEFINE_SPINLOCK(gic_lock);
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static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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{
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cpumask_t tmp = CPU_MASK_NONE;
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unsigned long flags;
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@ -166,7 +166,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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cpumask_and(&tmp, cpumask, cpu_online_mask);
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if (cpus_empty(tmp))
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return;
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return -1;
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/* Assumption : cpumask refers to a single CPU */
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spin_lock_irqsave(&gic_lock, flags);
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@ -190,6 +190,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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cpumask_copy(irq_desc[irq].affinity, cpumask);
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spin_unlock_irqrestore(&gic_lock, flags);
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return 0;
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}
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#endif
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@ -114,7 +114,7 @@ struct plat_smp_ops msmtc_smp_ops = {
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*/
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void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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cpumask_t tmask;
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int cpu = 0;
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@ -156,5 +156,7 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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/* Do any generic SMTC IRQ affinity setup */
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smtc_set_irq_affinity(irq, tmask);
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return 0;
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}
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#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
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@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq);
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static void disable_bcm1480_irq(unsigned int irq);
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static void ack_bcm1480_irq(unsigned int irq);
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#ifdef CONFIG_SMP
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static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
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static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
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#endif
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#ifdef CONFIG_PCI
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@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
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}
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#ifdef CONFIG_SMP
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static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
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static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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int i = 0, old_cpu, cpu, int_on, k;
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u64 cur_ints;
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@ -119,7 +119,7 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
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if (cpumask_weight(mask) != 1) {
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printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
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return;
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return -1;
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}
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i = cpumask_first(mask);
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@ -155,6 +155,8 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
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}
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spin_unlock(&bcm1480_imr_lock);
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spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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#endif
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@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq);
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static void disable_sb1250_irq(unsigned int irq);
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static void ack_sb1250_irq(unsigned int irq);
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#ifdef CONFIG_SMP
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static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
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static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
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#endif
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#ifdef CONFIG_SIBYTE_HAS_LDT
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@ -103,7 +103,7 @@ void sb1250_unmask_irq(int cpu, int irq)
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}
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#ifdef CONFIG_SMP
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static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
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static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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int i = 0, old_cpu, cpu, int_on;
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u64 cur_ints;
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@ -114,7 +114,7 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
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if (cpumask_weight(mask) > 1) {
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printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
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return;
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return -1;
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}
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/* Convert logical CPU to physical CPU */
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@ -146,6 +146,8 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
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}
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spin_unlock(&sb1250_imr_lock);
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spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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#endif
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@ -130,15 +130,17 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
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return cpu_dest;
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}
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static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
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static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
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{
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int cpu_dest;
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cpu_dest = cpu_check_affinity(irq, dest);
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if (cpu_dest < 0)
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return;
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return -1;
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cpumask_copy(&irq_desc[irq].affinity, dest);
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return 0;
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}
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#endif
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@ -333,7 +333,7 @@ static void xics_eoi_lpar(unsigned int virq)
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lpar_xirr_info_set((0xff << 24) | irq);
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}
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static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
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static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
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{
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unsigned int irq;
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int status;
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@ -342,14 +342,14 @@ static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
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irq = (unsigned int)irq_map[virq].hwirq;
|
||||
if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
|
||||
|
||||
if (status) {
|
||||
printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
|
||||
__func__, irq, status);
|
||||
return;
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -363,7 +363,7 @@ static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
|
||||
printk(KERN_WARNING
|
||||
"%s: No online cpus in the mask %s for irq %d\n",
|
||||
__func__, cpulist, virq);
|
||||
return;
|
||||
return -1;
|
||||
}
|
||||
|
||||
status = rtas_call(ibm_set_xive, 3, 1, NULL,
|
||||
@ -372,8 +372,10 @@ static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
|
||||
if (status) {
|
||||
printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
|
||||
__func__, irq, status);
|
||||
return;
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irq_chip xics_pic_direct = {
|
||||
|
@ -807,7 +807,7 @@ static void mpic_end_ipi(unsigned int irq)
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
{
|
||||
struct mpic *mpic = mpic_from_irq(irq);
|
||||
unsigned int src = mpic_irq_to_hw(irq);
|
||||
@ -824,6 +824,8 @@ void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
|
||||
mpic_physmask(cpus_addr(tmp)[0]));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
|
||||
|
@ -318,10 +318,12 @@ static void sun4u_irq_enable(unsigned int virt_irq)
|
||||
}
|
||||
}
|
||||
|
||||
static void sun4u_set_affinity(unsigned int virt_irq,
|
||||
static int sun4u_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
sun4u_irq_enable(virt_irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Don't do anything. The desc->status check for IRQ_DISABLED in
|
||||
@ -377,7 +379,7 @@ static void sun4v_irq_enable(unsigned int virt_irq)
|
||||
ino, err);
|
||||
}
|
||||
|
||||
static void sun4v_set_affinity(unsigned int virt_irq,
|
||||
static int sun4v_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
|
||||
@ -388,6 +390,8 @@ static void sun4v_set_affinity(unsigned int virt_irq,
|
||||
if (err != HV_EOK)
|
||||
printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
|
||||
"err(%d)\n", ino, cpuid, err);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sun4v_irq_disable(unsigned int virt_irq)
|
||||
@ -445,7 +449,7 @@ static void sun4v_virq_enable(unsigned int virt_irq)
|
||||
dev_handle, dev_ino, err);
|
||||
}
|
||||
|
||||
static void sun4v_virt_set_affinity(unsigned int virt_irq,
|
||||
static int sun4v_virt_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned long cpuid, dev_handle, dev_ino;
|
||||
@ -461,6 +465,8 @@ static void sun4v_virt_set_affinity(unsigned int virt_irq,
|
||||
printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
|
||||
"err(%d)\n",
|
||||
dev_handle, dev_ino, cpuid, err);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sun4v_virq_disable(unsigned int virt_irq)
|
||||
|
@ -574,13 +574,14 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
|
||||
return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain);
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
unsigned long flags;
|
||||
unsigned int dest;
|
||||
unsigned int irq;
|
||||
int ret = -1;
|
||||
|
||||
irq = desc->irq;
|
||||
cfg = desc->chip_data;
|
||||
@ -591,18 +592,21 @@ set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
|
||||
/* Only the high 8 bits are valid. */
|
||||
dest = SET_APIC_LOGICAL_ID(dest);
|
||||
__target_IO_APIC_irq(irq, dest, cfg);
|
||||
ret = 0;
|
||||
}
|
||||
spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
|
||||
set_ioapic_affinity_irq_desc(desc, mask);
|
||||
return set_ioapic_affinity_irq_desc(desc, mask);
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
@ -2348,24 +2352,25 @@ static int ioapic_retrigger_irq(unsigned int irq)
|
||||
* Real vector that is used for interrupting cpu will be coming from
|
||||
* the interrupt-remapping table entry.
|
||||
*/
|
||||
static void
|
||||
static int
|
||||
migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
struct irte irte;
|
||||
unsigned int dest;
|
||||
unsigned int irq;
|
||||
int ret = -1;
|
||||
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
return ret;
|
||||
|
||||
irq = desc->irq;
|
||||
if (get_irte(irq, &irte))
|
||||
return;
|
||||
return ret;
|
||||
|
||||
cfg = desc->chip_data;
|
||||
if (assign_irq_vector(irq, cfg, mask))
|
||||
return;
|
||||
return ret;
|
||||
|
||||
dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
|
||||
|
||||
@ -2381,27 +2386,30 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
|
||||
send_cleanup_vector(cfg);
|
||||
|
||||
cpumask_copy(desc->affinity, mask);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Migrates the IRQ destination in the process context.
|
||||
*/
|
||||
static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
|
||||
static int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
migrate_ioapic_irq_desc(desc, mask);
|
||||
return migrate_ioapic_irq_desc(desc, mask);
|
||||
}
|
||||
static void set_ir_ioapic_affinity_irq(unsigned int irq,
|
||||
static int set_ir_ioapic_affinity_irq(unsigned int irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
set_ir_ioapic_affinity_irq_desc(desc, mask);
|
||||
return set_ir_ioapic_affinity_irq_desc(desc, mask);
|
||||
}
|
||||
#else
|
||||
static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
|
||||
static inline int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -3318,7 +3326,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct irq_cfg *cfg;
|
||||
@ -3327,7 +3335,7 @@ static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
|
||||
dest = set_desc_affinity(desc, mask);
|
||||
if (dest == BAD_APICID)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
cfg = desc->chip_data;
|
||||
|
||||
@ -3339,13 +3347,15 @@ static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
msg.address_lo |= MSI_ADDR_DEST_ID(dest);
|
||||
|
||||
write_msi_msg_desc(desc, &msg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef CONFIG_INTR_REMAP
|
||||
/*
|
||||
* Migrate the MSI irq to another cpumask. This migration is
|
||||
* done in the process context using interrupt-remapping hardware.
|
||||
*/
|
||||
static void
|
||||
static int
|
||||
ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
@ -3354,11 +3364,11 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
struct irte irte;
|
||||
|
||||
if (get_irte(irq, &irte))
|
||||
return;
|
||||
return -1;
|
||||
|
||||
dest = set_desc_affinity(desc, mask);
|
||||
if (dest == BAD_APICID)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
irte.vector = cfg->vector;
|
||||
irte.dest_id = IRTE_DEST(dest);
|
||||
@ -3375,6 +3385,8 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
*/
|
||||
if (cfg->move_in_progress)
|
||||
send_cleanup_vector(cfg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -3528,7 +3540,7 @@ void arch_teardown_msi_irq(unsigned int irq)
|
||||
|
||||
#if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP)
|
||||
#ifdef CONFIG_SMP
|
||||
static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct irq_cfg *cfg;
|
||||
@ -3537,7 +3549,7 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
|
||||
dest = set_desc_affinity(desc, mask);
|
||||
if (dest == BAD_APICID)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
cfg = desc->chip_data;
|
||||
|
||||
@ -3549,6 +3561,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
msg.address_lo |= MSI_ADDR_DEST_ID(dest);
|
||||
|
||||
dmar_msi_write(irq, &msg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
@ -3582,7 +3596,7 @@ int arch_setup_dmar_msi(unsigned int irq)
|
||||
#ifdef CONFIG_HPET_TIMER
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct irq_cfg *cfg;
|
||||
@ -3591,7 +3605,7 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
|
||||
dest = set_desc_affinity(desc, mask);
|
||||
if (dest == BAD_APICID)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
cfg = desc->chip_data;
|
||||
|
||||
@ -3603,6 +3617,8 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
msg.address_lo |= MSI_ADDR_DEST_ID(dest);
|
||||
|
||||
hpet_msi_write(irq, &msg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
@ -3659,7 +3675,7 @@ static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
|
||||
write_ht_irq_msg(irq, &msg);
|
||||
}
|
||||
|
||||
static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct irq_cfg *cfg;
|
||||
@ -3667,11 +3683,13 @@ static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
|
||||
dest = set_desc_affinity(desc, mask);
|
||||
if (dest == BAD_APICID)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
cfg = desc->chip_data;
|
||||
|
||||
target_ht_irq(irq, dest, cfg->vector);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -702,7 +702,7 @@ static unsigned int iosapic_startup_irq(unsigned int irq)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void iosapic_set_affinity_irq(unsigned int irq,
|
||||
static int iosapic_set_affinity_irq(unsigned int irq,
|
||||
const struct cpumask *dest)
|
||||
{
|
||||
struct vector_info *vi = iosapic_get_vector(irq);
|
||||
@ -712,7 +712,7 @@ static void iosapic_set_affinity_irq(unsigned int irq,
|
||||
|
||||
dest_cpu = cpu_check_affinity(irq, dest);
|
||||
if (dest_cpu < 0)
|
||||
return;
|
||||
return -1;
|
||||
|
||||
cpumask_copy(irq_desc[irq].affinity, cpumask_of(dest_cpu));
|
||||
vi->txn_addr = txn_affinity_addr(irq, dest_cpu);
|
||||
@ -724,6 +724,8 @@ static void iosapic_set_affinity_irq(unsigned int irq,
|
||||
iosapic_set_irt_data(vi, &dummy_d0, &d1);
|
||||
iosapic_wr_irt_entry(vi, d0, d1);
|
||||
spin_unlock_irqrestore(&iosapic_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -688,13 +688,13 @@ void rebind_evtchn_irq(int evtchn, int irq)
|
||||
}
|
||||
|
||||
/* Rebind an evtchn so that it gets delivered to a specific cpu */
|
||||
static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
|
||||
static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
|
||||
{
|
||||
struct evtchn_bind_vcpu bind_vcpu;
|
||||
int evtchn = evtchn_from_irq(irq);
|
||||
|
||||
if (!VALID_EVTCHN(evtchn))
|
||||
return;
|
||||
return -1;
|
||||
|
||||
/* Send future instances of this interrupt to other vcpu. */
|
||||
bind_vcpu.port = evtchn;
|
||||
@ -707,13 +707,15 @@ static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
|
||||
*/
|
||||
if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
|
||||
bind_evtchn_to_cpu(evtchn, tcpu);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static void set_affinity_irq(unsigned irq, const struct cpumask *dest)
|
||||
static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
|
||||
{
|
||||
unsigned tcpu = cpumask_first(dest);
|
||||
rebind_irq_to_cpu(irq, tcpu);
|
||||
|
||||
return rebind_irq_to_cpu(irq, tcpu);
|
||||
}
|
||||
|
||||
int resend_irq_on_evtchn(unsigned int irq)
|
||||
|
@ -117,7 +117,7 @@ struct irq_chip {
|
||||
void (*eoi)(unsigned int irq);
|
||||
|
||||
void (*end)(unsigned int irq);
|
||||
void (*set_affinity)(unsigned int irq,
|
||||
int (*set_affinity)(unsigned int irq,
|
||||
const struct cpumask *dest);
|
||||
int (*retrigger)(unsigned int irq);
|
||||
int (*set_type)(unsigned int irq, unsigned int flow_type);
|
||||
|
Loading…
Reference in New Issue
Block a user