ARM: OMAP2+: Fix sar_base inititalization for HS omaps
[ Upstream commit fe27f16794f313f5fc16f6d2f42d8c2b2f4d70cc ] HS omaps use irq_save_secure_context() instead of irq_save_context() so sar_base will never get initialized and irq_sar_clear() gets called with a wrong address for HS omaps from irq_restore_context(). Starting with commit f4b9f40ae95b ("ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec") we have it available, and this ideally would been fixed with that commit already. Fixes: f4b9f40ae95b ("ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec") Cc: Andrew F. Davis <afd@ti.com> Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -299,8 +299,6 @@ static void irq_save_context(void)
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if (soc_is_dra7xx())
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return;
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if (!sar_base)
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sar_base = omap4_get_sar_ram_base();
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if (wakeupgen_ops && wakeupgen_ops->save_context)
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wakeupgen_ops->save_context();
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}
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@ -598,6 +596,8 @@ static int __init wakeupgen_init(struct device_node *node,
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irq_hotplug_init();
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irq_pm_init();
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sar_base = omap4_get_sar_ram_base();
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return 0;
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}
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IRQCHIP_DECLARE(ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init);
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