Berlin DT changes for v3.20 (round 1)
- add PMU nodes for BG2Q and BG2CD - add PPI CPU masks for TWD timer interrupts -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUr6KJAAoJEN2kpao7fSL4PI8P/1j5EQoIEFl+C53M3sY9EF/6 f+Qy38SCrv6d47YyqkFfSedAG7V78kK/VnPAmuVTrAXiejGW0aAl1Z4NIyuiHuAP uWwrOdqBQaooZzMeARG48VC3QgObz3yt6bb/q1D/AN/vkWfsZRqpRe9YGsT+3t7n BWRXTsOLXJ9ovwALcxrWGx4G5KS1DtR8iFm8tyzxkc3g4CMqfvPKe4n0MXcQyPW/ +JsdQrkmCXHuPoRHqf76DtdcdfDltl52CFyHZPHJK2LsQCtIOEG9P2zfDRNDPmFR uI0Duha568uQGTSWlP6mnD6FueHVKFEwLTYYu33ELEurSmeCej+fLlEE5+d20jTV K+mfkhyBy5RAT4NQQ33TK4vXNUaAPCmXW4wh/xdTO7j37MvkBZSbude1hgFGdA+5 rAj2Hsw7sdrT+i1DjHCLoDxdAeQEARywq/17E704OZ4aWjyL3AVBAs8pdQjjCF9d MA4d8TZ9lvWu2nD4iAfpxYLbH0yhymqLfbvZRBkURjM5tjMGeC79Wk0ZjK9OXOwi xm78UuMkW95sFJka3HzSUTTv0igx119tgctofCjM62Wc5kUaMCrtTuhoibm2tAt/ UtFMv8v47wy6TfdOrjbgKLxnRel34ECHtwXZXR3SkvJ2SLZWNe7BB+zoQzhWLOpe pQVDDCH95BzIVCxs6jIU =YfUK -----END PGP SIGNATURE----- Merge tag 'berlin-dt-for-3.20-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt Merge "ARM: berlin: DT changes for v3.20 (round 1)" from Sebastian Hesselbarth: Berlin DT changes for v3.20 (round 1) - add PMU nodes for BG2Q and BG2CD - add PPI CPU masks for TWD timer interrupts * tag 'berlin-dt-for-3.20-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: dts: berlin: add PPI cpu mask to twd timer interrupts ARM: dts: berlin: add pmu node for BG2Q and BG2CD Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
d708da24fb
@ -104,7 +104,7 @@
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local-timer@ad0600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xad0600 0x20>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
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clocks = <&chip CLKID_TWD>;
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};
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@ -45,6 +45,11 @@
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ranges = <0 0xf7000000 0x1000000>;
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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};
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sdhci0: sdhci@ab0000 {
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compatible = "mrvl,pxav3-mmc";
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reg = <0xab0000 0x200>;
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@ -71,7 +76,7 @@
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local-timer@ad0600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xad0600 0x20>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
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clocks = <&chip CLKID_TWD>;
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};
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@ -63,6 +63,14 @@
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ranges = <0 0xf7000000 0x1000000>;
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interrupt-parent = <&gic>;
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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};
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sdhci0: sdhci@ab0000 {
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compatible = "mrvl,pxav3-mmc";
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reg = <0xab0000 0x200>;
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@ -104,7 +112,7 @@
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xad0600 0x20>;
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clocks = <&chip CLKID_TWD>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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gic: interrupt-controller@ad1000 {
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