Renesas ARM64 Based SoC DT Updates for v5.3
* Renesas SoCs - Revise usb2_phy nodes and phys properties according to updated bindings - Use ip=on for bootargs * R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs - Add dynamic power coefficient - Create thermal zone to support IPA * R-Car E3 (r8a77990) and D3 (r8a77995) SoCs - Point LVDS0 to its companion LVDS1 * R-Car E3 (r8a77990) SoC - Corresct register range of DU * R-Car E3 (r8a77990) based Ebisu board - Remove renesas, no-ether-link property * R-Car D3 (r8a77995) based Draak board: - Remove unnecessary index from vin4 port * RZ/G2M (r8a774a1) based HiHope main and sub-boards: - Initial support - Describe CPU capacity and topoligy - Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0 * RZ/G2E (r8a774c0) SoC based EK874 board: - Clean up CPU compatible strings - Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAl0MmxcACgkQ189kaWo3 T75kSg//b3cCgBVkwq8CnUeoWG8qOXXSFU0YyigRv0sAsZEKpBik4cmPyB4KW/Kn BDfM3PCm9Xnq6e6O9xr4r+KHqw4Q27QYTcIIBVgkKqzx1iZi4lytO6H2R12Qjuap rFIEBRUlyXfKM/9iNcwiRRMLmYHgY/sYNOcWvn2Vb6X6B4uRA/2QkTL/mGo4XYMv FeOVlb1sIZravrru1RVE9wc1nLGk3t0Q9W5okZLMwVrfCIg8o8GwSxK7YOYKfB+p q7sA7rQOik61+2VDz2XdYRcS6BwlGJQXOTA/BgD457vsqLKI5wlmO66JcMMnEQo9 efl0dJS+T/8AiEO11jG1lmT5gsU+nCAI8wK2r7Pa59EnDBZGIrwX67sd/wi9YE8K CZ/mP9yd/S/g4Ai/pEiVLlsWJOs0/hmXT3MxZhThvk3vdQ7oq3ada6JUUn17lhPS davs6l5wtKfcKSxAXja0Wc5g1TXGQ0UMsSMNJmqX6T3zfgwIb7y3Wvrx8P1B3/q4 GYpnwBS2d7HISWhYQvaCbA3a5wnsbssjg2BmvOr0Nv0RgX0+qfmxADc2/vx9lcD7 VlEbjTtWWTV2FtbvsOZSFfMYDXP/LXdI+VWXSu5NHKcybooC/cuUYzNVOBsYda/k pSOW/EIou8kC4XlRGh3Vf/JNU4PagujDRVojhUwkztcjm+dteeY= =Qsip -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt Renesas ARM64 Based SoC DT Updates for v5.3 * Renesas SoCs - Revise usb2_phy nodes and phys properties according to updated bindings - Use ip=on for bootargs * R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs - Add dynamic power coefficient - Create thermal zone to support IPA * R-Car E3 (r8a77990) and D3 (r8a77995) SoCs - Point LVDS0 to its companion LVDS1 * R-Car E3 (r8a77990) SoC - Corresct register range of DU * R-Car E3 (r8a77990) based Ebisu board - Remove renesas, no-ether-link property * R-Car D3 (r8a77995) based Draak board: - Remove unnecessary index from vin4 port * RZ/G2M (r8a774a1) based HiHope main and sub-boards: - Initial support - Describe CPU capacity and topoligy - Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0 * RZ/G2E (r8a774c0) SoC based EK874 board: - Clean up CPU compatible strings - Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN * tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (53 commits) arm64: dts: renesas: hihope-common: Remove "label" from LEDs arm64: dts: renesas: hihope-common: Add HDMI support arm64: dts: renesas: r8a774a1: Add HDMI encoder instance arm64: dts: renesas: r8a774a1: Add dynamic power coefficient arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC arm64: dts: renesas: hihope-common: Add LEDs support arm64: dts: renesas: hihope-common: Enable USB3.0 arm64: dts: renesas: hihope-common: Add USB 2.0 support arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks arm64: dts: renesas: r8a774a1: Add TMU device nodes arm64: dts: renesas: r8a774a1: Add CMT device nodes arm64: dts: renesas: hihope-common: Add uSD and eMMC arm64: dts: renesas: r8a77990: Fix register range of display node arm64: dts: renesas: cat874: Enable usb role switch support arm64: dts: renesas: cat874: Enable USB3.0 host/peripheral device node arm64: dts: renesas: r8a7799[05]: Point LVDS0 to its companion LVDS1 arm64: dts: renesas: hihope-common: Add RWDT support arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
d71036005f
@ -1,4 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb
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dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb
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dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb
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dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
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dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-h3ulcb-kf.dtb
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325
arch/arm64/boot/dts/renesas/hihope-common.dtsi
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325
arch/arm64/boot/dts/renesas/hihope-common.dtsi
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@ -0,0 +1,325 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the HiHope RZ/G2[MN] main board common parts
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*
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* Copyright (C) 2019 Renesas Electronics Corp.
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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serial0 = &scif2;
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};
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chosen {
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bootargs = "ignore_loglevel";
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stdout-path = "serial0:115200n8";
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};
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hdmi0-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi0_con: endpoint {
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remote-endpoint = <&rcar_dw_hdmi0_out>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
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};
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led1 {
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gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
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};
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led2 {
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gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
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};
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led3 {
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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};
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};
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reg_1p8v: regulator0 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator1 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vbus0_usb2: regulator-vbus0-usb2 {
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compatible = "regulator-fixed";
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regulator-name = "USB20_VBUS0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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x302_clk: x302-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <33000000>;
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};
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x304_clk: x304-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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};
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&du {
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 722>,
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<&versaclock5 1>,
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<&x302_clk>,
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<&versaclock5 2>;
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clock-names = "du.0", "du.1", "du.2",
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"dclkin.0", "dclkin.1", "dclkin.2";
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status = "okay";
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&extal_clk {
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clock-frequency = <16666666>;
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&gpio6 {
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usb1-reset {
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gpio-hog;
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gpios = <10 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "usb1-reset";
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};
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};
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&hdmi0 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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rcar_dw_hdmi0_out: endpoint {
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remote-endpoint = <&hdmi0_con>;
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};
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};
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};
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};
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&hsusb {
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dr_mode = "otg";
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <400000>;
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status = "okay";
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versaclock5: clock-generator@6a {
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compatible = "idt,5p49v5923";
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reg = <0x6a>;
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#clock-cells = <1>;
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clocks = <&x304_clk>;
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clock-names = "xin";
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};
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};
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&pcie_bus_clk {
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clock-frequency = <100000000>;
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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scif2_pins: scif2 {
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groups = "scif2_data_a";
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function = "scif2";
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};
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scif_clk_pins: scif_clk {
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groups = "scif_clk_a";
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function = "scif_clk";
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};
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <3300>;
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};
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sdhi0_pins_uhs: sd0_uhs {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <1800>;
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};
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sdhi3_pins: sd3 {
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groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
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function = "sdhi3";
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power-source = <1800>;
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};
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usb0_pins: usb0 {
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groups = "usb0";
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function = "usb0";
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};
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usb1_pins: usb1 {
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mux {
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groups = "usb1";
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function = "usb1";
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};
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ovc {
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pins = "GP_6_27";
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bias-pull-up;
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};
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};
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usb30_pins: usb30 {
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groups = "usb30";
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function = "usb30";
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};
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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};
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&scif2 {
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pinctrl-0 = <&scif2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-1 = <&sdhi0_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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status = "okay";
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};
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&sdhi3 {
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pinctrl-0 = <&sdhi3_pins>;
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pinctrl-1 = <&sdhi3_pins>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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bus-width = <8>;
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mmc-hs200-1_8v;
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non-removable;
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fixed-emmc-driver-type = <1>;
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};
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&usb_extal_clk {
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clock-frequency = <50000000>;
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};
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&usb2_phy0 {
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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||||
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vbus-supply = <&vbus0_usb2>;
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||||
status = "okay";
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};
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||||
|
||||
&usb2_phy1 {
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
pinctrl-names = "default";
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||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_peri0 {
|
||||
phys = <&usb3_phy0>;
|
||||
phy-names = "usb";
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||||
|
||||
companion = <&xhci0>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
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status = "okay";
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||||
};
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||||
|
||||
&usb3s0_clk {
|
||||
clock-frequency = <100000000>;
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||||
};
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&xhci0 {
|
||||
pinctrl-0 = <&usb30_pins>;
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||||
pinctrl-names = "default";
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||||
|
||||
status = "okay";
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||||
};
|
63
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
Normal file
63
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
Normal file
@ -0,0 +1,63 @@
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||||
// SPDX-License-Identifier: GPL-2.0
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||||
/*
|
||||
* Device Tree Source for the RZ/G2[MN] HiHope sub board common parts
|
||||
*
|
||||
* Copyright (C) 2019 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = &avb;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
};
|
||||
};
|
||||
|
||||
&avb {
|
||||
pinctrl-0 = <&avb_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "rgmii-txid";
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <1500>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pciec0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pciec1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pfc {
|
||||
pinctrl-0 = <&scif_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
avb_pins: avb {
|
||||
mux {
|
||||
groups = "avb_link", "avb_mdio", "avb_mii";
|
||||
function = "avb";
|
||||
};
|
||||
|
||||
pins_mdio {
|
||||
groups = "avb_mdio";
|
||||
drive-strength = <24>;
|
||||
};
|
||||
|
||||
pins_mii_tx {
|
||||
pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
|
||||
"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
|
||||
drive-strength = <12>;
|
||||
};
|
||||
};
|
||||
};
|
15
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts
Normal file
15
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts
Normal file
@ -0,0 +1,15 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source for the HiHope RZ/G2M sub board
|
||||
*
|
||||
* Copyright (C) 2019 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include "r8a774a1-hihope-rzg2m.dts"
|
||||
#include "hihope-rzg2-ex.dtsi"
|
||||
|
||||
/ {
|
||||
model = "HopeRun HiHope RZ/G2M with sub board";
|
||||
compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m",
|
||||
"renesas,r8a774a1";
|
||||
};
|
26
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts
Normal file
26
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts
Normal file
@ -0,0 +1,26 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source for the HiHope RZ/G2M main board
|
||||
*
|
||||
* Copyright (C) 2019 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "r8a774a1.dtsi"
|
||||
#include "hihope-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "HopeRun HiHope RZ/G2M main board based on r8a774a1";
|
||||
compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";
|
||||
|
||||
memory@48000000 {
|
||||
device_type = "memory";
|
||||
/* first 128MB is reserved for secure area. */
|
||||
reg = <0x0 0x48000000 0x0 0x78000000>;
|
||||
};
|
||||
|
||||
memory@600000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x6 0x00000000 0x0 0x80000000>;
|
||||
};
|
||||
};
|
@ -56,10 +56,78 @@
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
cluster0_opp: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-500000000 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1500000000 {
|
||||
opp-hz = /bits/ 64 <1500000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1_opp: opp_table1 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1200000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&a57_0>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&a57_1>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
core0 {
|
||||
cpu = <&a53_0>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&a53_1>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&a53_2>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&a53_3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
a57_0: cpu@0 {
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0>;
|
||||
@ -67,7 +135,11 @@
|
||||
power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
|
||||
next-level-cache = <&L2_CA57>;
|
||||
enable-method = "psci";
|
||||
dynamic-power-coefficient = <854>;
|
||||
clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
capacity-dmips-mhz = <1024>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
a57_1: cpu@1 {
|
||||
@ -78,6 +150,9 @@
|
||||
next-level-cache = <&L2_CA57>;
|
||||
enable-method = "psci";
|
||||
clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
capacity-dmips-mhz = <1024>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
a53_0: cpu@100 {
|
||||
@ -87,7 +162,11 @@
|
||||
power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
dynamic-power-coefficient = <277>;
|
||||
clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
capacity-dmips-mhz = <560>;
|
||||
};
|
||||
|
||||
a53_1: cpu@101 {
|
||||
@ -98,6 +177,8 @@
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
capacity-dmips-mhz = <560>;
|
||||
};
|
||||
|
||||
a53_2: cpu@102 {
|
||||
@ -108,6 +189,8 @@
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
capacity-dmips-mhz = <560>;
|
||||
};
|
||||
|
||||
a53_3: cpu@103 {
|
||||
@ -118,6 +201,8 @@
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
capacity-dmips-mhz = <560>;
|
||||
};
|
||||
|
||||
L2_CA57: cache-controller-0 {
|
||||
@ -326,6 +411,76 @@
|
||||
reg = <0 0xe6060000 0 0x50c>;
|
||||
};
|
||||
|
||||
cmt0: timer@e60f0000 {
|
||||
compatible = "renesas,r8a774a1-cmt0",
|
||||
"renesas,rcar-gen3-cmt0";
|
||||
reg = <0 0xe60f0000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 303>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 303>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt1: timer@e6130000 {
|
||||
compatible = "renesas,r8a774a1-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6130000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 302>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 302>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt2: timer@e6140000 {
|
||||
compatible = "renesas,r8a774a1-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6140000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 301>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 301>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt3: timer@e6148000 {
|
||||
compatible = "renesas,r8a774a1-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6148000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 300>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 300>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a774a1-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x0bb0>;
|
||||
@ -377,6 +532,71 @@
|
||||
resets = <&cpg 407>;
|
||||
};
|
||||
|
||||
tmu0: timer@e61e0000 {
|
||||
compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
|
||||
reg = <0 0xe61e0000 0 0x30>;
|
||||
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 125>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 125>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tmu1: timer@e6fc0000 {
|
||||
compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
|
||||
reg = <0 0xe6fc0000 0 0x30>;
|
||||
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 124>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 124>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tmu2: timer@e6fd0000 {
|
||||
compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
|
||||
reg = <0 0xe6fd0000 0 0x30>;
|
||||
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 123>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 123>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tmu3: timer@e6fe0000 {
|
||||
compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
|
||||
reg = <0 0xe6fe0000 0 0x30>;
|
||||
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 122>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 122>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tmu4: timer@ffc00000 {
|
||||
compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
|
||||
reg = <0 0xffc00000 0 0x30>;
|
||||
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 121>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 121>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@e6500000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -601,15 +821,15 @@
|
||||
"renesas,rcar-gen3-usbhs";
|
||||
reg = <0 0xe6590000 0 0x200>;
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 704>;
|
||||
clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
|
||||
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -686,6 +906,14 @@
|
||||
resets = <&cpg 219>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
|
||||
<&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
|
||||
<&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
|
||||
<&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
|
||||
<&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
|
||||
<&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
|
||||
<&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
|
||||
<&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
|
||||
};
|
||||
|
||||
dmac1: dma-controller@e7300000 {
|
||||
@ -720,6 +948,14 @@
|
||||
resets = <&cpg 218>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
|
||||
<&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
|
||||
<&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
|
||||
<&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
|
||||
<&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
|
||||
<&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
|
||||
<&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
|
||||
<&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
|
||||
};
|
||||
|
||||
dmac2: dma-controller@e7310000 {
|
||||
@ -754,6 +990,14 @@
|
||||
resets = <&cpg 217>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
|
||||
<&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
|
||||
<&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
|
||||
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
|
||||
<&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
|
||||
<&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
|
||||
<&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
|
||||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
@ -869,6 +1113,7 @@
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 812>;
|
||||
phy-mode = "rgmii";
|
||||
iommus = <&ipmmu_ds0 16>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -1629,6 +1874,14 @@
|
||||
resets = <&cpg 502>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
|
||||
<&ipmmu_mp 2>, <&ipmmu_mp 3>,
|
||||
<&ipmmu_mp 4>, <&ipmmu_mp 5>,
|
||||
<&ipmmu_mp 6>, <&ipmmu_mp 7>,
|
||||
<&ipmmu_mp 8>, <&ipmmu_mp 9>,
|
||||
<&ipmmu_mp 10>, <&ipmmu_mp 11>,
|
||||
<&ipmmu_mp 12>, <&ipmmu_mp 13>,
|
||||
<&ipmmu_mp 14>, <&ipmmu_mp 15>;
|
||||
};
|
||||
|
||||
audma1: dma-controller@ec720000 {
|
||||
@ -1663,6 +1916,14 @@
|
||||
resets = <&cpg 501>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
|
||||
<&ipmmu_mp 18>, <&ipmmu_mp 19>,
|
||||
<&ipmmu_mp 20>, <&ipmmu_mp 21>,
|
||||
<&ipmmu_mp 22>, <&ipmmu_mp 23>,
|
||||
<&ipmmu_mp 24>, <&ipmmu_mp 25>,
|
||||
<&ipmmu_mp 26>, <&ipmmu_mp 27>,
|
||||
<&ipmmu_mp 28>, <&ipmmu_mp 29>,
|
||||
<&ipmmu_mp 30>, <&ipmmu_mp 31>;
|
||||
};
|
||||
|
||||
xhci0: usb@ee000000 {
|
||||
@ -1691,11 +1952,11 @@
|
||||
compatible = "generic-ohci";
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>;
|
||||
phys = <&usb2_phy0>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1704,7 +1965,7 @@
|
||||
reg = <0 0xee0a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
@ -1715,12 +1976,12 @@
|
||||
compatible = "generic-ehci";
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>;
|
||||
phys = <&usb2_phy0>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1729,7 +1990,7 @@
|
||||
reg = <0 0xee0a0100 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci1>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
@ -1742,10 +2003,10 @@
|
||||
"renesas,rcar-gen3-usb2-phy";
|
||||
reg = <0 0xee080200 0 0x700>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>;
|
||||
#phy-cells = <0>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1756,7 +2017,7 @@
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1825,6 +2086,70 @@
|
||||
resets = <&cpg 408>;
|
||||
};
|
||||
|
||||
pciec0: pcie@fe000000 {
|
||||
compatible = "renesas,pcie-r8a774a1",
|
||||
"renesas,pcie-rcar-gen3";
|
||||
reg = <0 0xfe000000 0 0x80000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
|
||||
clock-names = "pcie", "pcie_bus";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 319>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pciec1: pcie@ee800000 {
|
||||
compatible = "renesas,pcie-r8a774a1",
|
||||
"renesas,pcie-rcar-gen3";
|
||||
reg = <0 0xee800000 0 0x80000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
|
||||
0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
|
||||
0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
|
||||
0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
|
||||
clock-names = "pcie", "pcie_bus";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 318>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fdp1@fe940000 {
|
||||
compatible = "renesas,fdp1";
|
||||
reg = <0 0xfe940000 0 0x2400>;
|
||||
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 119>;
|
||||
power-domains = <&sysc R8A774A1_PD_A3VC>;
|
||||
resets = <&cpg 119>;
|
||||
renesas,fcp = <&fcpf0>;
|
||||
};
|
||||
|
||||
fcpf0: fcp@fe950000 {
|
||||
compatible = "renesas,fcpf";
|
||||
reg = <0 0xfe950000 0 0x200>;
|
||||
@ -1877,6 +2202,61 @@
|
||||
iommus = <&ipmmu_vc0 19>;
|
||||
};
|
||||
|
||||
vspb: vsp@fe960000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe960000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 626>;
|
||||
power-domains = <&sysc R8A774A1_PD_A3VC>;
|
||||
resets = <&cpg 626>;
|
||||
|
||||
renesas,fcp = <&fcpvb0>;
|
||||
};
|
||||
|
||||
vspd0: vsp@fea20000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea20000 0 0x5000>;
|
||||
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 623>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 623>;
|
||||
|
||||
renesas,fcp = <&fcpvd0>;
|
||||
};
|
||||
|
||||
vspd1: vsp@fea28000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea28000 0 0x5000>;
|
||||
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 622>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 622>;
|
||||
|
||||
renesas,fcp = <&fcpvd1>;
|
||||
};
|
||||
|
||||
vspd2: vsp@fea30000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea30000 0 0x5000>;
|
||||
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 621>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 621>;
|
||||
|
||||
renesas,fcp = <&fcpvd2>;
|
||||
};
|
||||
|
||||
vspi0: vsp@fe9a0000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe9a0000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 631>;
|
||||
power-domains = <&sysc R8A774A1_PD_A3VC>;
|
||||
resets = <&cpg 631>;
|
||||
|
||||
renesas,fcp = <&fcpvi0>;
|
||||
};
|
||||
|
||||
csi20: csi2@fea80000 {
|
||||
compatible = "renesas,r8a774a1-csi2";
|
||||
reg = <0 0xfea80000 0 0x10000>;
|
||||
@ -1988,6 +2368,101 @@
|
||||
};
|
||||
};
|
||||
|
||||
hdmi0: hdmi@fead0000 {
|
||||
compatible = "renesas,r8a774a1-hdmi",
|
||||
"renesas,rcar-gen3-hdmi";
|
||||
reg = <0 0xfead0000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 729>,
|
||||
<&cpg CPG_CORE R8A774A1_CLK_HDMI>;
|
||||
clock-names = "iahb", "isfr";
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 729>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
dw_hdmi0_in: endpoint {
|
||||
remote-endpoint = <&du_out_hdmi0>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
port@2 {
|
||||
/* HDMI sound */
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a774a1";
|
||||
reg = <0 0xfeb00000 0 0x70000>;
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 722>;
|
||||
clock-names = "du.0", "du.1", "du.2";
|
||||
status = "disabled";
|
||||
|
||||
vsps = <&vspd0 &vspd1 &vspd2>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
du_out_rgb: endpoint {
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_hdmi0: endpoint {
|
||||
remote-endpoint = <&dw_hdmi0_in>;
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
du_out_lvds0: endpoint {
|
||||
remote-endpoint = <&lvds0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lvds0: lvds@feb90000 {
|
||||
compatible = "renesas,r8a774a1-lvds";
|
||||
reg = <0 0xfeb90000 0 0x14>;
|
||||
clocks = <&cpg CPG_MOD 727>;
|
||||
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 727>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lvds0_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds0>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
lvds0_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
prr: chipid@fff00044 {
|
||||
compatible = "renesas,prr";
|
||||
reg = <0 0xfff00044 0 4>;
|
||||
@ -1999,6 +2474,7 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 0>;
|
||||
sustainable-power = <3874>;
|
||||
|
||||
trips {
|
||||
sensor1_crit: sensor1-crit {
|
||||
@ -2013,6 +2489,7 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 1>;
|
||||
sustainable-power = <3874>;
|
||||
|
||||
trips {
|
||||
sensor2_crit: sensor2-crit {
|
||||
@ -2021,21 +2498,39 @@
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
sensor_thermal3: sensor-thermal3 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 2>;
|
||||
sustainable-power = <3874>;
|
||||
|
||||
trips {
|
||||
target: trip-point1 {
|
||||
temperature = <100000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
sensor3_crit: sensor3-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&a57_0 0 2>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&a53_0 0 2>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -8,6 +8,7 @@
|
||||
/dts-v1/;
|
||||
#include "r8a774c0.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/display/tda998x.h>
|
||||
|
||||
/ {
|
||||
model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
|
||||
@ -15,13 +16,25 @@
|
||||
|
||||
aliases {
|
||||
serial0 = &scif2;
|
||||
serial1 = &hscif2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
hdmi-out {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_con_out: endpoint {
|
||||
remote-endpoint = <&tda19988_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
@ -52,6 +65,23 @@
|
||||
reg = <0x0 0x48000000 0x0 0x78000000>;
|
||||
};
|
||||
|
||||
sound: sound {
|
||||
compatible = "simple-audio-card";
|
||||
|
||||
simple-audio-card,name = "CAT874 HDMI sound";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&sndcpu>;
|
||||
simple-audio-card,frame-master = <&sndcpu>;
|
||||
|
||||
sndcpu: simple-audio-card,cpu {
|
||||
sound-dai = <&rcar_sound>;
|
||||
};
|
||||
|
||||
sndcodec: simple-audio-card,codec {
|
||||
sound-dai = <&tda19988>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_sdhi0: regulator-vcc-sdhi0 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
@ -74,6 +104,46 @@
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
};
|
||||
|
||||
wlan_en_reg: fixedregulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wlan-en-regulator";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
startup-delay-us = <70000>;
|
||||
|
||||
gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
x13_clk: x13 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <74250000>;
|
||||
};
|
||||
};
|
||||
|
||||
&audio_clk_a {
|
||||
clock-frequency = <22579200>;
|
||||
};
|
||||
|
||||
&du {
|
||||
pinctrl-0 = <&du_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&x13_clk>;
|
||||
clock-names = "du.0", "du.1", "dclkin.0";
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
endpoint {
|
||||
remote-endpoint = <&tda19988_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
@ -85,6 +155,81 @@
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
&hscif2 {
|
||||
pinctrl-0 = <&hscif2_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1837-st";
|
||||
enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
hd3ss3220@47 {
|
||||
compatible = "ti,hd3ss3220";
|
||||
reg = <0x47>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
hd3ss3220_ep: endpoint {
|
||||
remote-endpoint = <&usb3_role_switch>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tda19988: tda19988@70 {
|
||||
compatible = "nxp,tda998x";
|
||||
reg = <0x70>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
video-ports = <0x234501>;
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
audio-ports = <TDA998x_I2S 0x03>;
|
||||
clocks = <&rcar_sound 1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
tda19988_in: endpoint {
|
||||
remote-endpoint = <&du_out_rgb>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
tda19988_out: endpoint {
|
||||
remote-endpoint = <&hdmi_con_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -98,6 +243,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
&lvds0 {
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
|
||||
clock-names = "fck", "dclkin.0", "extal";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
@ -113,11 +265,22 @@
|
||||
};
|
||||
|
||||
&pfc {
|
||||
du_pins: du {
|
||||
groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
|
||||
"du_clk_in_0";
|
||||
function = "du";
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1 {
|
||||
groups = "i2c1_b";
|
||||
function = "i2c1";
|
||||
};
|
||||
|
||||
hscif2_pins: hscif2 {
|
||||
groups = "hscif2_data_a", "hscif2_ctrl_a";
|
||||
function = "hscif2";
|
||||
};
|
||||
|
||||
scif2_pins: scif2 {
|
||||
groups = "scif2_data_a";
|
||||
function = "scif2";
|
||||
@ -134,6 +297,47 @@
|
||||
function = "sdhi0";
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
sdhi3_pins: sd3 {
|
||||
groups = "sdhi3_data4", "sdhi3_ctrl";
|
||||
function = "sdhi3";
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
sound_pins: sound {
|
||||
groups = "ssi01239_ctrl", "ssi0_data";
|
||||
function = "ssi";
|
||||
};
|
||||
|
||||
sound_clk_pins: sound_clk {
|
||||
groups = "audio_clkout1_a";
|
||||
function = "audio_clk";
|
||||
};
|
||||
|
||||
usb30_pins: usb30 {
|
||||
groups = "usb30", "usb30_id";
|
||||
function = "usb30";
|
||||
};
|
||||
};
|
||||
|
||||
&rcar_sound {
|
||||
pinctrl-0 = <&sound_pins &sound_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Single DAI */
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
/* audio_clkout0/1/2/3 */
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <11289600>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
rcar_sound,dai {
|
||||
dai0 {
|
||||
playback = <&ssi0 &src0 &dvc0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rwdt {
|
||||
@ -162,7 +366,47 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhi3 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&sdhi3_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
vmmc-supply = <&wlan_en_reg>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1837";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_phy0 {
|
||||
renesas,no-otg-pins;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_peri0 {
|
||||
companion = <&xhci0>;
|
||||
status = "okay";
|
||||
usb-role-switch;
|
||||
|
||||
port {
|
||||
usb3_role_switch: endpoint {
|
||||
remote-endpoint = <&hd3ss3220_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&xhci0 {
|
||||
pinctrl-0 = <&usb30_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -70,7 +70,7 @@
|
||||
#size-cells = <0>;
|
||||
|
||||
a53_0: cpu@0 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0>;
|
||||
device_type = "cpu";
|
||||
power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
|
||||
@ -81,7 +81,7 @@
|
||||
};
|
||||
|
||||
a53_1: cpu@1 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <1>;
|
||||
device_type = "cpu";
|
||||
power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
|
||||
@ -684,7 +684,7 @@
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
@ -1580,7 +1580,7 @@
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
@ -1592,7 +1592,7 @@
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
|
||||
@ -1608,7 +1608,7 @@
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -155,6 +155,7 @@
|
||||
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
|
||||
next-level-cache = <&L2_CA57>;
|
||||
enable-method = "psci";
|
||||
dynamic-power-coefficient = <854>;
|
||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
capacity-dmips-mhz = <1024>;
|
||||
@ -207,6 +208,8 @@
|
||||
power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
dynamic-power-coefficient = <277>;
|
||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
capacity-dmips-mhz = <535>;
|
||||
@ -812,7 +815,7 @@
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
@ -829,7 +832,7 @@
|
||||
<&usb_dmac3 0>, <&usb_dmac3 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy3>;
|
||||
phys = <&usb2_phy3 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 705>, <&cpg 700>;
|
||||
@ -1450,6 +1453,17 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tpu: pwm@e6e80000 {
|
||||
compatible = "renesas,tpu-r8a7795", "renesas,tpu";
|
||||
reg = <0 0xe6e80000 0 0x148>;
|
||||
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 304>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 304>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof0: spi@e6e90000 {
|
||||
compatible = "renesas,msiof-r8a7795",
|
||||
"renesas,rcar-gen3-msiof";
|
||||
@ -2405,7 +2419,7 @@
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
@ -2417,7 +2431,7 @@
|
||||
reg = <0 0xee0a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
@ -2429,7 +2443,7 @@
|
||||
reg = <0 0xee0c0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 701>;
|
||||
phys = <&usb2_phy2>;
|
||||
phys = <&usb2_phy2 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 701>;
|
||||
@ -2441,7 +2455,7 @@
|
||||
reg = <0 0xee0e0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
||||
phys = <&usb2_phy3>;
|
||||
phys = <&usb2_phy3 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 700>, <&cpg 705>;
|
||||
@ -2453,7 +2467,7 @@
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
@ -2466,7 +2480,7 @@
|
||||
reg = <0 0xee0a0100 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci1>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
@ -2479,7 +2493,7 @@
|
||||
reg = <0 0xee0c0100 0 0x100>;
|
||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 701>;
|
||||
phys = <&usb2_phy2>;
|
||||
phys = <&usb2_phy2 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci2>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
@ -2492,7 +2506,7 @@
|
||||
reg = <0 0xee0e0100 0 0x100>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
||||
phys = <&usb2_phy3>;
|
||||
phys = <&usb2_phy3 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci3>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
@ -2508,7 +2522,7 @@
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2519,7 +2533,7 @@
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2530,7 +2544,7 @@
|
||||
clocks = <&cpg CPG_MOD 701>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 701>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2542,7 +2556,7 @@
|
||||
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 700>, <&cpg 705>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -3168,58 +3182,30 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 0>;
|
||||
sustainable-power = <6313>;
|
||||
|
||||
trips {
|
||||
sensor1_passive: sensor1-passive {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
sensor1_crit: sensor1-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&sensor1_passive>;
|
||||
cooling-device = <&a57_0 4 4>,
|
||||
<&a57_1 4 4>,
|
||||
<&a57_2 4 4>,
|
||||
<&a57_3 4 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal2: sensor-thermal2 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 1>;
|
||||
sustainable-power = <6313>;
|
||||
|
||||
trips {
|
||||
sensor2_passive: sensor2-passive {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
sensor2_crit: sensor2-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&sensor2_passive>;
|
||||
cooling-device = <&a57_0 4 4>,
|
||||
<&a57_1 4 4>,
|
||||
<&a57_2 4 4>,
|
||||
<&a57_3 4 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal3: sensor-thermal3 {
|
||||
@ -3228,11 +3214,12 @@
|
||||
thermal-sensors = <&tsc 2>;
|
||||
|
||||
trips {
|
||||
sensor3_passive: sensor3-passive {
|
||||
temperature = <95000>;
|
||||
target: trip-point1 {
|
||||
temperature = <100000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
sensor3_crit: sensor3-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
@ -3242,11 +3229,15 @@
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&sensor3_passive>;
|
||||
cooling-device = <&a57_0 4 4>,
|
||||
<&a57_1 4 4>,
|
||||
<&a57_2 4 4>,
|
||||
<&a57_3 4 4>;
|
||||
trip = <&target>;
|
||||
cooling-device = <&a57_0 2 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&a53_0 0 2>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -160,6 +160,7 @@
|
||||
power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
|
||||
next-level-cache = <&L2_CA57>;
|
||||
enable-method = "psci";
|
||||
dynamic-power-coefficient = <854>;
|
||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
capacity-dmips-mhz = <1024>;
|
||||
@ -186,6 +187,8 @@
|
||||
power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
dynamic-power-coefficient = <277>;
|
||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
capacity-dmips-mhz = <535>;
|
||||
@ -783,7 +786,7 @@
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
@ -1319,6 +1322,17 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tpu: pwm@e6e80000 {
|
||||
compatible = "renesas,tpu-r8a7796", "renesas,tpu";
|
||||
reg = <0 0xe6e80000 0 0x148>;
|
||||
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 304>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 304>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof0: spi@e6e90000 {
|
||||
compatible = "renesas,msiof-r8a7796",
|
||||
"renesas,rcar-gen3-msiof";
|
||||
@ -2275,7 +2289,7 @@
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
@ -2287,7 +2301,7 @@
|
||||
reg = <0 0xee0a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
@ -2299,7 +2313,7 @@
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
@ -2312,7 +2326,7 @@
|
||||
reg = <0 0xee0a0100 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci1>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
@ -2328,7 +2342,7 @@
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2339,7 +2353,7 @@
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2814,76 +2828,61 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 0>;
|
||||
sustainable-power = <3874>;
|
||||
|
||||
trips {
|
||||
sensor1_passive: sensor1-passive {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
sensor1_crit: sensor1-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&sensor1_passive>;
|
||||
cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal2: sensor-thermal2 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 1>;
|
||||
sustainable-power = <3874>;
|
||||
|
||||
trips {
|
||||
sensor2_passive: sensor2-passive {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
sensor2_crit: sensor2-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&sensor2_passive>;
|
||||
cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sensor_thermal3: sensor-thermal3 {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 2>;
|
||||
sustainable-power = <3874>;
|
||||
|
||||
trips {
|
||||
sensor3_passive: sensor3-passive {
|
||||
temperature = <95000>;
|
||||
target: trip-point1 {
|
||||
temperature = <100000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
sensor3_crit: sensor3-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&sensor3_passive>;
|
||||
cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
|
||||
trip = <&target>;
|
||||
cooling-device = <&a57_0 2 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&a53_0 0 2>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -111,6 +111,8 @@
|
||||
power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
|
||||
next-level-cache = <&L2_CA57>;
|
||||
enable-method = "psci";
|
||||
#cooling-cells = <2>;
|
||||
dynamic-power-coefficient = <854>;
|
||||
clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
};
|
||||
@ -667,7 +669,7 @@
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
@ -1195,6 +1197,17 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tpu: pwm@e6e80000 {
|
||||
compatible = "renesas,tpu-r8a77965", "renesas,tpu";
|
||||
reg = <0 0xe6e80000 0 0x148>;
|
||||
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 304>;
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 304>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msiof0: spi@e6e90000 {
|
||||
compatible = "renesas,msiof-r8a77965",
|
||||
"renesas,rcar-gen3-msiof";
|
||||
@ -2015,7 +2028,7 @@
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
@ -2027,7 +2040,7 @@
|
||||
reg = <0 0xee0a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
@ -2039,7 +2052,7 @@
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
@ -2052,7 +2065,7 @@
|
||||
reg = <0 0xee0a0100 0 0x100>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1>;
|
||||
phys = <&usb2_phy1 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci1>;
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
@ -2068,7 +2081,7 @@
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2079,7 +2092,7 @@
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -2519,6 +2532,7 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 0>;
|
||||
sustainable-power = <2439>;
|
||||
|
||||
trips {
|
||||
sensor1_crit: sensor1-crit {
|
||||
@ -2533,6 +2547,7 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 1>;
|
||||
sustainable-power = <2439>;
|
||||
|
||||
trips {
|
||||
sensor2_crit: sensor2-crit {
|
||||
@ -2547,14 +2562,30 @@
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&tsc 2>;
|
||||
sustainable-power = <2439>;
|
||||
|
||||
trips {
|
||||
target: trip-point1 {
|
||||
/* miliCelsius */
|
||||
temperature = <100000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
sensor3_crit: sensor3-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&a57_0 2 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -19,7 +19,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
|
@ -19,7 +19,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
@ -262,7 +262,6 @@
|
||||
&avb {
|
||||
pinctrl-0 = <&avb_pins>;
|
||||
pinctrl-names = "default";
|
||||
renesas,no-ether-link;
|
||||
phy-handle = <&phy0>;
|
||||
status = "okay";
|
||||
|
||||
|
@ -84,9 +84,11 @@
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0>;
|
||||
device_type = "cpu";
|
||||
#cooling-cells = <2>;
|
||||
power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
|
||||
next-level-cache = <&L2_CA53>;
|
||||
enable-method = "psci";
|
||||
dynamic-power-coefficient = <277>;
|
||||
clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
};
|
||||
@ -630,7 +632,7 @@
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
@ -1537,7 +1539,7 @@
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
@ -1549,7 +1551,7 @@
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
@ -1565,7 +1567,7 @@
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1758,7 +1760,7 @@
|
||||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a77990";
|
||||
reg = <0 0xfeb00000 0 0x80000>;
|
||||
reg = <0 0xfeb00000 0 0x40000>;
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
@ -1801,6 +1803,8 @@
|
||||
resets = <&cpg 727>;
|
||||
status = "disabled";
|
||||
|
||||
renesas,companion = <&lvds1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -1856,11 +1860,18 @@
|
||||
thermal-zones {
|
||||
cpu-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&thermal>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&thermal 0>;
|
||||
sustainable-power = <717>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
target: trip-point1 {
|
||||
temperature = <100000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
sensor1_crit: sensor1-crit {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
@ -1868,6 +1879,11 @@
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&a53_0 0 2>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -20,7 +20,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
@ -511,12 +511,7 @@
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
port {
|
||||
vin4_in: endpoint {
|
||||
remote-endpoint = <&adv7180_out>;
|
||||
};
|
||||
|
@ -354,7 +354,7 @@
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
@ -875,7 +875,7 @@
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
@ -887,7 +887,7 @@
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||
@ -903,7 +903,7 @@
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <0>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1038,6 +1038,8 @@
|
||||
resets = <&cpg 727>;
|
||||
status = "disabled";
|
||||
|
||||
renesas,companion = <&lvds1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -39,7 +39,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
|
@ -38,6 +38,18 @@
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
wlan_en: regulator-wlan_en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wlan-en-regulator";
|
||||
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpio = <&gpio_exp_74 4 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&can0 {
|
||||
@ -88,6 +100,13 @@
|
||||
line-name = "Audio_Out_OFF";
|
||||
};
|
||||
|
||||
sd-wifi-mux {
|
||||
gpio-hog;
|
||||
gpios = <5 GPIO_ACTIVE_HIGH>;
|
||||
output-low; /* Connect WL1837 */
|
||||
line-name = "SD WiFi mux";
|
||||
};
|
||||
|
||||
hub_pwen {
|
||||
gpio-hog;
|
||||
gpios = <6 GPIO_ACTIVE_HIGH>;
|
||||
@ -254,6 +273,12 @@
|
||||
function = "scif1";
|
||||
};
|
||||
|
||||
sdhi3_pins: sdhi3 {
|
||||
groups = "sdhi3_data4", "sdhi3_ctrl";
|
||||
function = "sdhi3";
|
||||
power-source = <3300>;
|
||||
};
|
||||
|
||||
usb0_pins: usb0 {
|
||||
groups = "usb0";
|
||||
function = "usb0";
|
||||
@ -273,6 +298,30 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhi3 {
|
||||
pinctrl-0 = <&sdhi3_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
vmmc-supply = <&wlan_en>;
|
||||
vqmmc-supply = <&wlan_en>;
|
||||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
max-frequency = <26000000>;
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1837";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_phy0 {
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -26,7 +26,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user