can: m_can: pci: fix iomap_read_fifo() and iomap_write_fifo()
The same fix that was previously done in m_can_platform in commit 99d173fbe894 ("can: m_can: fix iomap_read_fifo() and iomap_write_fifo()") is required in m_can_pci as well to make iomap_read_fifo() and iomap_write_fifo() work for val_count > 1. Fixes: 812270e5445b ("can: m_can: Batch FIFO writes during CAN transmit") Fixes: 1aa6772f64b4 ("can: m_can: Batch FIFO reads during CAN receive") Link: https://lore.kernel.org/all/20211118144011.10921-1-matthias.schiffer@ew.tq-group.com Cc: stable@vger.kernel.org Cc: Matt Kline <matt@bitbashing.io> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -42,8 +42,13 @@ static u32 iomap_read_reg(struct m_can_classdev *cdev, int reg)
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static int iomap_read_fifo(struct m_can_classdev *cdev, int offset, void *val, size_t val_count)
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{
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struct m_can_pci_priv *priv = cdev_to_priv(cdev);
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void __iomem *src = priv->base + offset;
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ioread32_rep(priv->base + offset, val, val_count);
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while (val_count--) {
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*(unsigned int *)val = ioread32(src);
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val += 4;
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src += 4;
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}
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return 0;
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}
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@ -61,8 +66,13 @@ static int iomap_write_fifo(struct m_can_classdev *cdev, int offset,
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const void *val, size_t val_count)
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{
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struct m_can_pci_priv *priv = cdev_to_priv(cdev);
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void __iomem *dst = priv->base + offset;
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iowrite32_rep(priv->base + offset, val, val_count);
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while (val_count--) {
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iowrite32(*(unsigned int *)val, dst);
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val += 4;
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dst += 4;
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}
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return 0;
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}
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