rtw89: extend mac tx_en bits from 16 to 32
In order to support 8852C that uses 32 bits to control TX types. This patch doesn't really use 32 bits tx_en yet, but next patch will use it. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220317055543.40514-12-pkshih@realtek.com
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@ -609,7 +609,7 @@ struct rtw89_channel_params {
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};
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struct rtw89_channel_help_params {
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u16 tx_en;
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u32 tx_en;
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};
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struct rtw89_port_reg {
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@ -2247,7 +2247,7 @@ static int rtw89_set_hw_sch_tx_en(struct rtw89_dev *rtwdev, u8 mac_idx,
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}
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int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx,
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u16 *tx_en, enum rtw89_sch_tx_sel sel)
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u32 *tx_en, enum rtw89_sch_tx_sel sel)
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{
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int ret;
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@ -2285,7 +2285,7 @@ int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx,
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}
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EXPORT_SYMBOL(rtw89_mac_stop_sch_tx);
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int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en)
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int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en)
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{
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int ret;
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@ -2459,7 +2459,7 @@ static int band1_enable(struct rtw89_dev *rtwdev)
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int ret, i;
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u32 sleep_bak[4] = {0};
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u32 pause_bak[4] = {0};
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u16 tx_en;
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u32 tx_en;
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ret = rtw89_mac_stop_sch_tx(rtwdev, 0, &tx_en, RTW89_SCH_TX_SEL_ALL);
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if (ret) {
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@ -791,8 +791,8 @@ void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb,
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u32 len, u8 class, u8 func);
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int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev);
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int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx,
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u16 *tx_en, enum rtw89_sch_tx_sel sel);
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int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en);
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u32 *tx_en, enum rtw89_sch_tx_sel sel);
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int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
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int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_ids, bool enable);
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void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx);
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void rtw89_mac_flush_txq(struct rtw89_dev *rtwdev, u32 queues, bool drop);
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@ -3526,7 +3526,7 @@ static void _tssi_pre_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)
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const struct rtw89_chip_info *mac_reg = rtwdev->chip;
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u8 ch = rtwdev->hal.current_channel, ch_tmp;
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u8 bw = rtwdev->hal.current_band_width;
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u16 tx_en;
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u32 tx_en;
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u8 phy_map = rtw89_btc_phymap(rtwdev, phy, 0);
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s8 power;
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s16 xdbm;
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@ -3623,7 +3623,7 @@ void rtw8852a_dack(struct rtw89_dev *rtwdev)
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void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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u16 tx_en;
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u32 tx_en;
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u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0);
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rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START);
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@ -3648,7 +3648,7 @@ void rtw8852a_iqk_track(struct rtw89_dev *rtwdev)
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void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
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bool is_afe)
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{
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u16 tx_en;
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u32 tx_en;
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u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0);
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rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START);
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@ -3663,7 +3663,7 @@ void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
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void rtw8852a_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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u16 tx_en;
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u32 tx_en;
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u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0);
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rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START);
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