powerpc: retire sbc8641d board support
The support was for this was added to mainline over 12 years ago, in v2.6.26 [4e8aae89a35d] just around the ppc --> powerpc migration. I believe the board was introduced shortly after the sbc8548 board, making it roughly a 14 year old platform - with the CPU speed and memory size typical for that era. I haven't had one of these boards for several years, and availability was discontinued several years before that. Given that, there is no point in adding a burden to testing coverage that builds all possible defconfigs, so it makes sense to remove it. Of course it will remain in the git history forever, for anyone who happens to find a functional board and wants to tinker with it. Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Paul Gortmaker
Michael Ellerman
parent
c12adb0678
commit
d7c1814f2f
@ -1,176 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* SBC8641D Device Tree Source
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*
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* Copyright 2008 Wind River Systems Inc.
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*
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* Paul Gortmaker (see MAINTAINERS for contact information)
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*
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* Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
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*/
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/include/ "mpc8641si-pre.dtsi"
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/ {
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model = "SBC8641D";
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compatible = "wind,sbc8641";
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; // 512M at 0x0
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};
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lbc: localbus@f8005000 {
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reg = <0xf8005000 0x1000>;
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ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
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1 0 0xf0000000 0x00010000 // 64KB EEPROM
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2 0 0xf1000000 0x00100000 // EPLD (1MB)
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3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
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4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
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6 0 0xf4000000 0x00100000 // LCD display (1MB)
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7 0 0xe8000000 0x04000000>; // 64MB OneNAND
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x01000000>;
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bank-width = <2>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "dtb";
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reg = <0x00000000 0x00100000>;
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read-only;
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};
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partition@300000 {
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label = "kernel";
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reg = <0x00100000 0x00400000>;
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read-only;
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};
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partition@400000 {
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label = "fs";
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reg = <0x00500000 0x00a00000>;
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};
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partition@700000 {
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label = "firmware";
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reg = <0x00f00000 0x00100000>;
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read-only;
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};
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};
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epld@2,0 {
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compatible = "wrs,epld-localbus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <2 0 0x100000>;
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ranges = <0 0 5 0 1 // User switches
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1 0 5 1 1 // Board ID/Rev
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3 0 5 3 1>; // LEDs
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};
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};
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soc: soc@f8000000 {
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ranges = <0x00000000 0xf8000000 0x00100000>;
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enet0: ethernet@24000 {
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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mdio@24520 {
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phy0: ethernet-phy@1f {
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reg = <0x1f>;
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};
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phy1: ethernet-phy@0 {
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reg = <0>;
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};
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phy2: ethernet-phy@1 {
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reg = <1>;
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};
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phy3: ethernet-phy@2 {
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reg = <2>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet1: ethernet@25000 {
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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mdio@25520 {
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet2: ethernet@26000 {
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tbi-handle = <&tbi2>;
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phy-handle = <&phy2>;
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phy-connection-type = "rgmii-id";
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};
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mdio@26520 {
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tbi2: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet3: ethernet@27000 {
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tbi-handle = <&tbi3>;
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phy-handle = <&phy3>;
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phy-connection-type = "rgmii-id";
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};
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mdio@27520 {
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tbi3: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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pci0: pcie@f8008000 {
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reg = <0xf8008000 0x1000>;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
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interrupt-map-mask = <0xff00 0 0 7>;
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pcie@0 {
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ranges = <0x02000000 0x0 0x80000000
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0x02000000 0x0 0x80000000
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0x0 0x20000000
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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0x0 0x00100000>;
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};
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};
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pci1: pcie@f8009000 {
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reg = <0xf8009000 0x1000>;
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ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
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pcie@0 {
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ranges = <0x02000000 0x0 0xa0000000
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0x02000000 0x0 0xa0000000
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0x0 0x20000000
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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0x0 0x00100000>;
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};
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};
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};
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/include/ "mpc8641si-post.dtsi"
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@ -1,6 +1,5 @@
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CONFIG_PPC_86xx=y
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CONFIG_MPC8641_HPCN=y
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CONFIG_SBC8641D=y
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CONFIG_MPC8610_HPCD=y
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CONFIG_GEF_PPC9A=y
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CONFIG_GEF_SBC310=y
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@ -55,7 +55,6 @@ CONFIG_MPC837x_RDB=y
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CONFIG_ASP834x=y
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CONFIG_PPC_86xx=y
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CONFIG_MPC8641_HPCN=y
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CONFIG_SBC8641D=y
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CONFIG_MPC8610_HPCD=y
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CONFIG_GEF_SBC610=y
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CONFIG_CPU_FREQ=y
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@ -20,12 +20,6 @@ config MPC8641_HPCN
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help
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This option enables support for the MPC8641 HPCN board.
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config SBC8641D
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bool "Wind River SBC8641D"
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select DEFAULT_UIMAGE
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help
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This option enables support for the WRS SBC8641D board.
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config MPC8610_HPCD
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bool "Freescale MPC8610 HPCD"
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select DEFAULT_UIMAGE
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@ -74,7 +68,7 @@ config MPC8641
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select FSL_PCI if PCI
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select PPC_UDBG_16550
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select MPIC
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default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A \
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default y if MPC8641_HPCN || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A \
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|| MVME7100
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config MPC8610
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@ -6,7 +6,6 @@
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obj-y := pic.o common.o
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obj-$(CONFIG_SMP) += mpc86xx_smp.o
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obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
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obj-$(CONFIG_SBC8641D) += sbc8641d.o
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obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
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obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o
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obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o
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@ -1,87 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* SBC8641D board specific routines
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*
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* Copyright 2008 Wind River Systems Inc.
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*
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* By Paul Gortmaker (see MAINTAINERS for contact information)
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*
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* Based largely on the 8641 HPCN support by Freescale Semiconductor Inc.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of_platform.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/prom.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <sysdev/fsl_pci.h>
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#include <sysdev/fsl_soc.h>
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#include "mpc86xx.h"
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static void __init
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sbc8641_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("sbc8641_setup_arch()", 0);
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printk("SBC8641 board from Wind River\n");
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#ifdef CONFIG_SMP
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mpc86xx_smp_init();
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#endif
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fsl_pci_assign_primary();
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}
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static void
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sbc8641_show_cpuinfo(struct seq_file *m)
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{
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uint svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Wind River Systems\n");
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init sbc8641_probe(void)
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{
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if (of_machine_is_compatible("wind,sbc8641"))
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return 1; /* Looks good */
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return 0;
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}
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machine_arch_initcall(sbc8641, mpc86xx_common_publish_devices);
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define_machine(sbc8641) {
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.name = "SBC8641D",
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.probe = sbc8641_probe,
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.setup_arch = sbc8641_setup_arch,
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.init_IRQ = mpc86xx_init_irq,
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.show_cpuinfo = sbc8641_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.time_init = mpc86xx_time_init,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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};
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