media: atmel: fix the ispck initialization
The runtime enabling of the ISPCK (internally clocks the pipeline inside
the ISC) has to be done after the pm_runtime for the ISC dev has been
started.
After the commit by Mauro:
the ISC failed to probe with the error:
atmel-sama5d2-isc f0008000.isc: failed to enable ispck: -13
atmel-sama5d2-isc: probe of f0008000.isc failed with error -13
This is because the enabling of the ispck is done too early in the probe,
and the PM runtime returns invalid request.
Thus, moved this clock enabling after pm_runtime_idle is called.
The ISPCK is required only for sama5d2 type of ISC.
Thus, add a bool inside the isc struct that is platform dependent.
For the sama7g5-isc, the enabling of the ISPCK is wrong and does not make
sense. Removed it from the sama7g5 probe. In sama7g5-isc, there is only
one clock, the MCK, which also clocks the internal pipeline of the ISC.
Adapted the clk_prepare and clk_unprepare to request the runtime PM
for both clocks (MCK and ISPCK) in case of sama5d2-isc, and the single
clock (MCK) in case of sama7g5-isc.
Fixes: dd97908ee3
("media: atmel: properly get pm_runtime")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
parent
9d45ccf721
commit
d7f26849ed
@ -123,11 +123,9 @@ static int isc_clk_prepare(struct clk_hw *hw)
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struct isc_clk *isc_clk = to_isc_clk(hw);
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int ret;
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if (isc_clk->id == ISC_ISPCK) {
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ret = pm_runtime_resume_and_get(isc_clk->dev);
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if (ret < 0)
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return ret;
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}
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ret = pm_runtime_resume_and_get(isc_clk->dev);
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if (ret < 0)
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return ret;
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return isc_wait_clk_stable(hw);
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}
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@ -138,8 +136,7 @@ static void isc_clk_unprepare(struct clk_hw *hw)
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isc_wait_clk_stable(hw);
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if (isc_clk->id == ISC_ISPCK)
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pm_runtime_put_sync(isc_clk->dev);
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pm_runtime_put_sync(isc_clk->dev);
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}
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static int isc_clk_enable(struct clk_hw *hw)
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@ -186,16 +183,13 @@ static int isc_clk_is_enabled(struct clk_hw *hw)
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u32 status;
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int ret;
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if (isc_clk->id == ISC_ISPCK) {
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ret = pm_runtime_resume_and_get(isc_clk->dev);
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if (ret < 0)
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return 0;
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}
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ret = pm_runtime_resume_and_get(isc_clk->dev);
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if (ret < 0)
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return 0;
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regmap_read(isc_clk->regmap, ISC_CLKSR, &status);
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if (isc_clk->id == ISC_ISPCK)
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pm_runtime_put_sync(isc_clk->dev);
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pm_runtime_put_sync(isc_clk->dev);
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return status & ISC_CLK(isc_clk->id) ? 1 : 0;
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}
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@ -325,6 +319,9 @@ static int isc_clk_register(struct isc_device *isc, unsigned int id)
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const char *parent_names[3];
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int num_parents;
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if (id == ISC_ISPCK && !isc->ispck_required)
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return 0;
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num_parents = of_clk_get_parent_count(np);
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if (num_parents < 1 || num_parents > 3)
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return -EINVAL;
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@ -178,6 +178,7 @@ struct isc_reg_offsets {
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* @hclock: Hclock clock input (refer datasheet)
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* @ispck: iscpck clock (refer datasheet)
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* @isc_clks: ISC clocks
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* @ispck_required: ISC requires ISP Clock initialization
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* @dcfg: DMA master configuration, architecture dependent
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*
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* @dev: Registered device driver
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@ -252,6 +253,7 @@ struct isc_device {
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struct clk *hclock;
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struct clk *ispck;
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struct isc_clk isc_clks[2];
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bool ispck_required;
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u32 dcfg;
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struct device *dev;
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@ -454,6 +454,9 @@ static int atmel_isc_probe(struct platform_device *pdev)
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/* sama5d2-isc - 8 bits per beat */
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isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
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/* sama5d2-isc : ISPCK is required and mandatory */
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isc->ispck_required = true;
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ret = isc_pipeline_init(isc);
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if (ret)
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return ret;
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@ -476,22 +479,6 @@ static int atmel_isc_probe(struct platform_device *pdev)
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dev_err(dev, "failed to init isc clock: %d\n", ret);
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goto unprepare_hclk;
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}
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isc->ispck = isc->isc_clks[ISC_ISPCK].clk;
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ret = clk_prepare_enable(isc->ispck);
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if (ret) {
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dev_err(dev, "failed to enable ispck: %d\n", ret);
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goto unprepare_hclk;
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}
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/* ispck should be greater or equal to hclock */
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ret = clk_set_rate(isc->ispck, clk_get_rate(isc->hclock));
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if (ret) {
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dev_err(dev, "failed to set ispck rate: %d\n", ret);
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goto unprepare_clk;
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}
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ret = v4l2_device_register(dev, &isc->v4l2_dev);
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if (ret) {
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dev_err(dev, "unable to register v4l2 device.\n");
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@ -546,19 +533,35 @@ static int atmel_isc_probe(struct platform_device *pdev)
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pm_runtime_enable(dev);
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pm_request_idle(dev);
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isc->ispck = isc->isc_clks[ISC_ISPCK].clk;
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ret = clk_prepare_enable(isc->ispck);
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if (ret) {
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dev_err(dev, "failed to enable ispck: %d\n", ret);
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goto cleanup_subdev;
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}
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/* ispck should be greater or equal to hclock */
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ret = clk_set_rate(isc->ispck, clk_get_rate(isc->hclock));
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if (ret) {
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dev_err(dev, "failed to set ispck rate: %d\n", ret);
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goto unprepare_clk;
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}
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regmap_read(isc->regmap, ISC_VERSION + isc->offsets.version, &ver);
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dev_info(dev, "Microchip ISC version %x\n", ver);
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return 0;
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unprepare_clk:
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clk_disable_unprepare(isc->ispck);
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cleanup_subdev:
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isc_subdev_cleanup(isc);
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unregister_v4l2_device:
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v4l2_device_unregister(&isc->v4l2_dev);
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unprepare_clk:
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clk_disable_unprepare(isc->ispck);
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unprepare_hclk:
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clk_disable_unprepare(isc->hclock);
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@ -447,6 +447,9 @@ static int microchip_xisc_probe(struct platform_device *pdev)
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/* sama7g5-isc RAM access port is full AXI4 - 32 bits per beat */
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isc->dcfg = ISC_DCFG_YMBSIZE_BEATS32 | ISC_DCFG_CMBSIZE_BEATS32;
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/* sama7g5-isc : ISPCK does not exist, ISC is clocked by MCK */
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isc->ispck_required = false;
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ret = isc_pipeline_init(isc);
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if (ret)
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return ret;
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@ -470,25 +473,10 @@ static int microchip_xisc_probe(struct platform_device *pdev)
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goto unprepare_hclk;
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}
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isc->ispck = isc->isc_clks[ISC_ISPCK].clk;
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ret = clk_prepare_enable(isc->ispck);
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if (ret) {
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dev_err(dev, "failed to enable ispck: %d\n", ret);
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goto unprepare_hclk;
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}
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/* ispck should be greater or equal to hclock */
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ret = clk_set_rate(isc->ispck, clk_get_rate(isc->hclock));
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if (ret) {
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dev_err(dev, "failed to set ispck rate: %d\n", ret);
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goto unprepare_clk;
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}
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ret = v4l2_device_register(dev, &isc->v4l2_dev);
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if (ret) {
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dev_err(dev, "unable to register v4l2 device.\n");
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goto unprepare_clk;
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goto unprepare_hclk;
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}
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ret = xisc_parse_dt(dev, isc);
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@ -550,8 +538,6 @@ cleanup_subdev:
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unregister_v4l2_device:
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v4l2_device_unregister(&isc->v4l2_dev);
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unprepare_clk:
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clk_disable_unprepare(isc->ispck);
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unprepare_hclk:
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clk_disable_unprepare(isc->hclock);
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