habanalabs: implement INFO IOCTL
This patch implements the INFO IOCTL. That IOCTL is used by the user to query information that is relevant/needed by the user in order to submit deep learning jobs to Goya. The information is divided into several categories, such as H/W IP, Events that happened, DDR usage and more. Reviewed-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Oded Gabbay
Greg Kroah-Hartman
parent
0feaf86d4e
commit
d8dd7b0a81
@ -5131,6 +5131,11 @@ static void goya_hw_queues_unlock(struct hl_device *hdev)
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spin_unlock(&goya->hw_queues_lock);
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}
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static u32 goya_get_pci_id(struct hl_device *hdev)
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{
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return hdev->pdev->device;
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}
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int goya_get_eeprom_data(struct hl_device *hdev, void *data, size_t max_size)
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{
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struct goya_device *goya = hdev->asic_specific;
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@ -5232,6 +5237,7 @@ static const struct hl_asic_funcs goya_funcs = {
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.soft_reset_late_init = goya_soft_reset_late_init,
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.hw_queues_lock = goya_hw_queues_lock,
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.hw_queues_unlock = goya_hw_queues_unlock,
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.get_pci_id = goya_get_pci_id,
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.get_eeprom_data = goya_get_eeprom_data,
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.send_cpu_message = goya_send_cpu_message,
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.get_hw_state = goya_get_hw_state
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@ -470,6 +470,7 @@ enum hl_pll_frequency {
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* @soft_reset_late_init: perform certain actions needed after soft reset.
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* @hw_queues_lock: acquire H/W queues lock.
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* @hw_queues_unlock: release H/W queues lock.
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* @get_pci_id: retrieve PCI ID.
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* @get_eeprom_data: retrieve EEPROM data from F/W.
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* @send_cpu_message: send buffer to ArmCP.
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* @get_hw_state: retrieve the H/W state
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@ -539,6 +540,7 @@ struct hl_asic_funcs {
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int (*soft_reset_late_init)(struct hl_device *hdev);
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void (*hw_queues_lock)(struct hl_device *hdev);
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void (*hw_queues_unlock)(struct hl_device *hdev);
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u32 (*get_pci_id)(struct hl_device *hdev);
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int (*get_eeprom_data)(struct hl_device *hdev, void *data,
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size_t max_size);
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int (*send_cpu_message)(struct hl_device *hdev, u32 *msg,
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@ -12,10 +12,136 @@
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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static int hw_ip_info(struct hl_device *hdev, struct hl_info_args *args)
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{
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struct hl_info_hw_ip_info hw_ip = {0};
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u32 size = args->return_size;
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void __user *out = (void __user *) (uintptr_t) args->return_pointer;
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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u64 sram_kmd_size, dram_kmd_size;
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if ((!size) || (!out))
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return -EINVAL;
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sram_kmd_size = (prop->sram_user_base_address -
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prop->sram_base_address);
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dram_kmd_size = (prop->dram_user_base_address -
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prop->dram_base_address);
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hw_ip.device_id = hdev->asic_funcs->get_pci_id(hdev);
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hw_ip.sram_base_address = prop->sram_user_base_address;
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hw_ip.dram_base_address = prop->dram_user_base_address;
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hw_ip.tpc_enabled_mask = prop->tpc_enabled_mask;
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hw_ip.sram_size = prop->sram_size - sram_kmd_size;
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hw_ip.dram_size = prop->dram_size - dram_kmd_size;
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if (hw_ip.dram_size > 0)
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hw_ip.dram_enabled = 1;
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hw_ip.num_of_events = prop->num_of_events;
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memcpy(hw_ip.armcp_version,
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prop->armcp_info.armcp_version, VERSION_MAX_LEN);
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hw_ip.armcp_cpld_version = prop->armcp_info.cpld_version;
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hw_ip.psoc_pci_pll_nr = prop->psoc_pci_pll_nr;
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hw_ip.psoc_pci_pll_nf = prop->psoc_pci_pll_nf;
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hw_ip.psoc_pci_pll_od = prop->psoc_pci_pll_od;
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hw_ip.psoc_pci_pll_div_factor = prop->psoc_pci_pll_div_factor;
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return copy_to_user(out, &hw_ip,
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min((size_t)size, sizeof(hw_ip))) ? -EFAULT : 0;
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}
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static int hw_events_info(struct hl_device *hdev, struct hl_info_args *args)
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{
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u32 size, max_size = args->return_size;
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void __user *out = (void __user *) (uintptr_t) args->return_pointer;
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void *arr;
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if ((!max_size) || (!out))
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return -EINVAL;
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arr = hdev->asic_funcs->get_events_stat(hdev, &size);
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return copy_to_user(out, arr, min(max_size, size)) ? -EFAULT : 0;
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}
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static int dram_usage_info(struct hl_device *hdev, struct hl_info_args *args)
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{
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struct hl_info_dram_usage dram_usage = {0};
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u32 max_size = args->return_size;
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void __user *out = (void __user *) (uintptr_t) args->return_pointer;
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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u64 dram_kmd_size;
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if ((!max_size) || (!out))
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return -EINVAL;
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dram_kmd_size = (prop->dram_user_base_address -
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prop->dram_base_address);
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dram_usage.dram_free_mem = (prop->dram_size - dram_kmd_size) -
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atomic64_read(&hdev->dram_used_mem);
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dram_usage.ctx_dram_mem = atomic64_read(&hdev->user_ctx->dram_phys_mem);
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return copy_to_user(out, &dram_usage,
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min((size_t) max_size, sizeof(dram_usage))) ? -EFAULT : 0;
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}
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static int hw_idle(struct hl_device *hdev, struct hl_info_args *args)
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{
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struct hl_info_hw_idle hw_idle = {0};
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u32 max_size = args->return_size;
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void __user *out = (void __user *) (uintptr_t) args->return_pointer;
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if ((!max_size) || (!out))
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return -EINVAL;
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hw_idle.is_idle = hdev->asic_funcs->is_device_idle(hdev);
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return copy_to_user(out, &hw_idle,
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min((size_t) max_size, sizeof(hw_idle))) ? -EFAULT : 0;
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}
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static int hl_info_ioctl(struct hl_fpriv *hpriv, void *data)
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{
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struct hl_info_args *args = data;
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struct hl_device *hdev = hpriv->hdev;
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int rc;
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if (hl_device_disabled_or_in_reset(hdev)) {
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dev_err(hdev->dev,
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"Device is disabled or in reset. Can't execute INFO IOCTL\n");
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return -EBUSY;
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}
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switch (args->op) {
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case HL_INFO_HW_IP_INFO:
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rc = hw_ip_info(hdev, args);
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break;
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case HL_INFO_HW_EVENTS:
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rc = hw_events_info(hdev, args);
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break;
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case HL_INFO_DRAM_USAGE:
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rc = dram_usage_info(hdev, args);
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break;
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case HL_INFO_HW_IDLE:
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rc = hw_idle(hdev, args);
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break;
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default:
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dev_err(hdev->dev, "Invalid request %d\n", args->op);
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rc = -ENOTTY;
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break;
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}
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return rc;
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}
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#define HL_IOCTL_DEF(ioctl, _func) \
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[_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func}
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static const struct hl_ioctl_desc hl_ioctls[] = {
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HL_IOCTL_DEF(HL_IOCTL_INFO, hl_info_ioctl),
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HL_IOCTL_DEF(HL_IOCTL_CB, hl_cb_ioctl),
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HL_IOCTL_DEF(HL_IOCTL_CS, hl_cs_ioctl),
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HL_IOCTL_DEF(HL_IOCTL_WAIT_CS, hl_cs_wait_ioctl),
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@ -45,6 +45,62 @@ enum goya_queue_id {
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GOYA_QUEUE_ID_SIZE
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};
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/* Opcode for management ioctl */
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#define HL_INFO_HW_IP_INFO 0
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#define HL_INFO_HW_EVENTS 1
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#define HL_INFO_DRAM_USAGE 2
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#define HL_INFO_HW_IDLE 3
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#define HL_INFO_VERSION_MAX_LEN 128
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struct hl_info_hw_ip_info {
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__u64 sram_base_address;
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__u64 dram_base_address;
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__u64 dram_size;
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__u32 sram_size;
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__u32 num_of_events;
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__u32 device_id; /* PCI Device ID */
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__u32 reserved[3];
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__u32 armcp_cpld_version;
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__u32 psoc_pci_pll_nr;
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__u32 psoc_pci_pll_nf;
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__u32 psoc_pci_pll_od;
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__u32 psoc_pci_pll_div_factor;
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__u8 tpc_enabled_mask;
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__u8 dram_enabled;
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__u8 pad[2];
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__u8 armcp_version[HL_INFO_VERSION_MAX_LEN];
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};
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struct hl_info_dram_usage {
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__u64 dram_free_mem;
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__u64 ctx_dram_mem;
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};
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struct hl_info_hw_idle {
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__u32 is_idle;
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__u32 pad;
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};
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struct hl_info_args {
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/* Location of relevant struct in userspace */
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__u64 return_pointer;
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/*
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* The size of the return value. Just like "size" in "snprintf",
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* it limits how many bytes the kernel can write
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*
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* For hw_events array, the size should be
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* hl_info_hw_ip_info.num_of_events * sizeof(__u32)
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*/
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__u32 return_size;
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/* HL_INFO_* */
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__u32 op;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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__u32 pad;
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};
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/* Opcode to create a new command buffer */
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#define HL_CB_OP_CREATE 0
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@ -264,6 +320,23 @@ union hl_mem_args {
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struct hl_mem_out out;
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};
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/*
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* Various information operations such as:
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* - H/W IP information
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* - Current dram usage
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*
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* The user calls this IOCTL with an opcode that describes the required
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* information. The user should supply a pointer to a user-allocated memory
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* chunk, which will be filled by the driver with the requested information.
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*
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* The user supplies the maximum amount of size to copy into the user's memory,
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* in order to prevent data corruption in case of differences between the
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* definitions of structures in kernel and userspace, e.g. in case of old
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* userspace and new kernel driver
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*/
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#define HL_IOCTL_INFO \
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_IOWR('H', 0x01, struct hl_info_args)
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/*
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* Command Buffer
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* - Request a Command Buffer
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@ -365,7 +438,7 @@ union hl_mem_args {
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#define HL_IOCTL_MEMORY \
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_IOWR('H', 0x05, union hl_mem_args)
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#define HL_COMMAND_START 0x02
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#define HL_COMMAND_START 0x01
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#define HL_COMMAND_END 0x06
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#endif /* HABANALABS_H_ */
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