ARM: OMAP2+: PRCM: split and relocate the PRM/CM globals setup
Split omap2_set_globals_prcm() into PRM, CM, and PRCM_MPU variants, since these are all separate IP blocks. This should make it easier to move the PRM, CM, PRCM_MPU code into drivers/ in future patchsets. At this point arch/arm/plat-omap/include/plat/prcm.h is empty; a subsequent patch will remove it, and remove the #include from all the files that #include it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
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@ -30,7 +30,7 @@
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#include "clock.h"
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#include "clock2xxx.h"
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#include "opp2xxx.h"
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#include "cm2xxx_3xxx.h"
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#include "cm2xxx.h"
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#include "cm-regbits-24xx.h"
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#include "sdrc.h"
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@ -39,7 +39,7 @@
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#include "clock.h"
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#include "clock2xxx.h"
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#include "opp2xxx.h"
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#include "cm2xxx_3xxx.h"
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#include "cm2xxx.h"
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#include "cm-regbits-24xx.h"
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#include "sdrc.h"
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@ -1,7 +1,7 @@
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/*
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* OMAP2+ Clock Management prototypes
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*
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* Copyright (C) 2007-2009 Texas Instruments, Inc.
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* Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
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* Copyright (C) 2007-2009 Nokia Corporation
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*
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* Written by Paul Walmsley
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@ -22,6 +22,12 @@
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*/
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#define MAX_MODULE_READY_TIME 2000
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# ifndef __ASSEMBLER__
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extern void __iomem *cm_base;
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extern void __iomem *cm2_base;
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extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
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# endif
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/*
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* MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
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* the PRCM to request that a module enter the inactive state in the
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@ -16,7 +16,7 @@
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#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
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#define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
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#include "prcm-common.h"
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#include "cm.h"
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/*
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* Module specific CM register offsets from CM_BASE + domain offset
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@ -2,7 +2,7 @@
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* OMAP2+ common Clock Management (CM) IP block functions
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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* Paul Walmsley <paul@pwsan.com>
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -17,6 +17,7 @@
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#include "cm2xxx.h"
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#include "cm3xxx.h"
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#include "cm44xx.h"
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#include "common.h"
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/*
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* cm_ll_data: function pointers to SoC-specific implementations of
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@ -25,6 +26,25 @@
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static struct cm_ll_data null_cm_ll_data;
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static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
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/* cm_base: base virtual address of the CM IP block */
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void __iomem *cm_base;
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/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
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void __iomem *cm2_base;
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/**
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* omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
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* @cm: CM base virtual address
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* @cm2: CM2 base virtual address (if present on the booted SoC)
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*
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* XXX Will be replaced when the PRM/CM drivers are completed.
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*/
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void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
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{
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cm_base = cm;
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cm2_base = cm2;
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}
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/**
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* cm_split_idlest_reg - split CM_IDLEST reg addr into its components
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* @idlest_reg: CM_IDLEST* virtual address
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@ -38,4 +38,6 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst,
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extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
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u32 mask);
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extern void omap_cm_base_init(void);
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#endif
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@ -47,7 +47,11 @@
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#include "serial.h"
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#include "cm2xxx.h"
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#include "cm3xxx.h"
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#include "prm.h"
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#include "cm.h"
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#include "prcm_mpu44xx.h"
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#include "prminst44xx.h"
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#include "cminst44xx.h"
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/*
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* The machine specific code may provide the extra mapping besides the
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* default mapping provided here.
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@ -386,9 +390,8 @@ void __init omap2420_init_early(void)
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OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
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NULL);
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omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
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NULL, NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
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omap2xxx_check_revision();
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omap2xxx_cm_init();
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omap_common_init_early();
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@ -416,9 +419,8 @@ void __init omap2430_init_early(void)
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OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
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NULL);
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omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
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NULL, NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
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omap2xxx_check_revision();
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omap2xxx_cm_init();
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omap_common_init_early();
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@ -450,9 +452,8 @@ void __init omap3_init_early(void)
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OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
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NULL);
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omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
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NULL, NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
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omap3xxx_check_revision();
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omap3xxx_check_features();
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omap3xxx_cm_init();
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@ -491,9 +492,8 @@ void __init ti81xx_init_early(void)
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OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
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NULL);
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omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
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OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
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NULL, NULL);
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
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omap3xxx_check_revision();
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ti81xx_check_features();
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omap_common_init_early();
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@ -555,9 +555,8 @@ void __init am33xx_init_early(void)
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AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
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omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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NULL);
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omap2_set_globals_prcm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
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AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
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NULL, NULL);
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omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
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omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
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omap3xxx_check_revision();
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ti81xx_check_features();
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omap_common_init_early();
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@ -577,10 +576,12 @@ void __init omap4430_init_early(void)
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OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
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omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
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omap_prm_base_init();
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omap_cm_base_init();
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omap4xxx_check_revision();
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omap4xxx_check_features();
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omap_common_init_early();
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@ -607,10 +608,12 @@ void __init omap5_init_early(void)
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OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
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omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
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omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
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omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
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omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
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OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
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omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
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omap_prm_base_init();
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omap_cm_base_init();
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omap5xxx_check_revision();
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omap_common_init_early();
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}
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* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
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* Sidetone needs non-gated ICLK and sidetone autoidle is broken.
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*/
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#include "cm2xxx_3xxx.h"
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#include "cm3xxx.h"
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#include "cm-regbits-34xx.h"
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static int omap3_enable_st_clock(unsigned int id, bool enable)
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#include "mmc.h"
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#include "hsmmc.h"
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#include "prminst44xx.h"
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#include "prcm_mpu44xx.h"
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#include "omap4-sar-layout.h"
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#include "omap-secure.h"
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@ -421,22 +421,6 @@
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#define MAX_IOPAD_LATCH_TIME 100
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# ifndef __ASSEMBLER__
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extern void __iomem *prm_base;
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extern void __iomem *cm_base;
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extern void __iomem *cm2_base;
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extern void __iomem *prcm_mpu_base;
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
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extern void omap_prm_base_init(void);
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extern void omap_cm_base_init(void);
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#else
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static inline void omap_prm_base_init(void)
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{
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}
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static inline void omap_cm_base_init(void)
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{
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}
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#endif
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/**
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* struct omap_prcm_irq - describes a PRCM interrupt bit
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#include "prm-regbits-44xx.h"
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#include "control.h"
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void __iomem *prm_base;
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void __iomem *cm_base;
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void __iomem *cm2_base;
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void __iomem *prcm_mpu_base;
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void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
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void __iomem *cm2, void __iomem *prcm_mpu)
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{
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prm_base = prm;
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cm_base = cm;
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cm2_base = cm2;
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prcm_mpu_base = prcm_mpu;
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if (cpu_is_omap44xx() || soc_is_omap54xx()) {
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omap_prm_base_init();
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omap_cm_base_init();
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}
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}
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/*
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* Stubbed functions so that common files continue to build when
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#include "prcm_mpu44xx.h"
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#include "cm-regbits-44xx.h"
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/*
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* prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP
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* block registers
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*/
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void __iomem *prcm_mpu_base;
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/* PRCM_MPU low-level functions */
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u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
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@ -43,3 +49,14 @@ u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
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return v;
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}
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/**
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* omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use)
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* @prcm_mpu: PRCM_MPU base virtual address
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*
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* XXX Will be replaced when the PRM/CM drivers are completed.
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*/
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void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu)
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{
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prcm_mpu_base = prcm_mpu;
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}
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/*
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* OMAP44xx PRCM MPU instance offset macros
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Copyright (C) 2010, 2012 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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*
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* Paul Walmsley (paul@pwsan.com)
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@ -25,6 +25,12 @@
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#ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
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#define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
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#include "common.h"
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# ifndef __ASSEMBLER__
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extern void __iomem *prcm_mpu_base;
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# endif
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#define OMAP4430_PRCM_MPU_BASE 0x48243000
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#define OMAP44XX_PRCM_MPU_REGADDR(inst, reg) \
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@ -98,6 +104,7 @@ extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
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extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
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extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
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s16 idx);
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extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu);
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# endif
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#endif
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/*
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* OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions
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*
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* Copyright (C) 2007-2009 Texas Instruments, Inc.
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* Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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*
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* Paul Walmsley
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@ -15,6 +15,11 @@
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#include "prcm-common.h"
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# ifndef __ASSEMBLER__
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extern void __iomem *prm_base;
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extern void omap2_set_globals_prm(void __iomem *prm);
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# endif
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/*
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* 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
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*
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@ -31,6 +31,7 @@
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#include "prm2xxx.h"
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#include "prm3xxx.h"
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#include "prm44xx.h"
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#include "common.h"
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/*
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* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
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@ -55,6 +56,9 @@ static struct irq_chip_generic **prcm_irq_chips;
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*/
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static struct omap_prcm_irq_setup *prcm_irq_setup;
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/* prm_base: base virtual address of the PRM IP block */
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void __iomem *prm_base;
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/*
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* prm_ll_data: function pointers to SoC-specific implementations of
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* common PRM functions
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@ -328,6 +332,17 @@ err:
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return -ENOMEM;
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}
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/**
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* omap2_set_globals_prm - set the PRM base address (for early use)
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* @prm: PRM base virtual address
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*
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* XXX Will be replaced when the PRM/CM drivers are completed.
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*/
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void __init omap2_set_globals_prm(void __iomem *prm)
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{
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prm_base = prm;
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}
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/**
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* prm_read_reset_sources - return the sources of the SoC's last reset
|
||||
*
|
||||
|
@ -30,4 +30,6 @@ extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
|
||||
extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
|
||||
u16 rstctrl_offs);
|
||||
|
||||
extern void omap_prm_base_init(void);
|
||||
|
||||
#endif
|
||||
|
@ -27,11 +27,7 @@
|
||||
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
|
||||
#define __ASM_ARM_ARCH_OMAP_PRCM_H
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
|
||||
void __iomem *cm2, void __iomem *prcm_mpu);
|
||||
/* XXX To be removed */
|
||||
|
||||
#endif
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user