AT91 fixes for 6.1 #3
It contains: - build fix for SAMA5D3 devices which don't have an L2 cache and due to this accesssing outer_cache.write_sec in sama5_secure_cache_init() could throw undefined reference to `outer_cache' if CONFIG_OUTER_CACHE is disabled from common sama5_defconfig. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCY39P2QAKCRCejrg/N2X7 /ZqrAQCqmwZchH2nuCZMWVGtWuSDqUT0+3QGflfKUdopej7mFQD9Er7AsGUYyGNb ATKG7UCtJc+YUwiiNi56NcUnsYQ7KAg= =CqR7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmOGGxEACgkQmmx57+YA GNluqhAAnh7Limb1aluPs+KgInLzgjI7cj7+XDs29NrV2o84GK8G0z8WFOLbBuJj AigK83e16fPWPGq5/ptriAzfBlRjPlpbYItue7iPyVL+eW21kcFNLTx10jHaLwZ/ HJwLuo1mvyXbJvCI6/5cO+lfriWDsALnB+gABNPPocU6P/2qXMAsjfeAbl1rRNF0 LAdwP/nsbBJEqdiv7anuLG3gagwQ0mYBNKATXQ7o+KRXf6Y6ZFCGsjN0uvmlkFFQ 7oTO3eobULqLGBMZTm6F+6/v7TEaEs7/DQ4CRdmYxVVICJxxdghpKsmVpHmasFva D4xGIpAQZAYkrYiRPLi5uDJ6xA2DoE0wYtgM2PEGbFt8Nh0r1fWHZs/Kg8sKIuFZ HrEF7j+E7kCU3imbOGfMSFeJtls+C4fYN1zuECE07zfR0aN3z5u6ax9YdohRPXKw 3TaNEZFpDxD5FwTA8FcFgHCB5Hbx/fM1VIZo889pVm6XUMWaft1a5B/MXaCjfgV4 s/FG99BuuAYw37GBcyauFUISMY6mAvZUk7369VTUHYpQF/jqvpA2zGAq8DlucAVu IQQ3ufTka/20RUq/WyVa7eq5qCYIMZr33CmlnT9YHrKJZIRlgtd1mJh5WzS+N9r3 juSNTrvSc2NOStG1hygsXu84GOHpL3bXQ8aaR5pSeCz7Uy+fMsw= =R63p -----END PGP SIGNATURE----- Merge tag 'at91-fixes-6.1-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes AT91 fixes for 6.1 #3 It contains: - build fix for SAMA5D3 devices which don't have an L2 cache and due to this accesssing outer_cache.write_sec in sama5_secure_cache_init() could throw undefined reference to `outer_cache' if CONFIG_OUTER_CACHE is disabled from common sama5_defconfig. * tag 'at91-fixes-6.1-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: fix build for SAMA5D3 w/o L2 cache Link: https://lore.kernel.org/r/20221125093521.382105-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -26,7 +26,7 @@ static void sama5_l2c310_write_sec(unsigned long val, unsigned reg)
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static void __init sama5_secure_cache_init(void)
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{
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sam_secure_init();
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if (sam_linux_is_optee_available())
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if (IS_ENABLED(CONFIG_OUTER_CACHE) && sam_linux_is_optee_available())
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outer_cache.write_sec = sama5_l2c310_write_sec;
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}
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