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Pin control fixes for the v3.13 series:

Browse Source 
- Minor bug fixes for the Rockchip, ST-Ericsson abx500,
   Renesas PFC r8a7740 and sh7372.
 
 - Compilation warning fixes.
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Merge tag 'pinctrl-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

 - Minor bug fixes for the Rockchip, ST-Ericsson abx500, Renesas PFC
   r8a7740 and sh7372.

 - Compilation warning fixes.

* tag 'pinctrl-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  sh-pfc: sh7372: Fix pin bias setup
  sh-pfc: r8a7740: Fix pin bias setup
  pinctrl: abx500: Fix header file include guard
  pinctrl: rockchip: missing unlock on error in rockchip_set_pull()
  pinctrl: abx500: fix some more bitwise AND tests
  pinctrl: rockchip: testing the wrong variable
This commit is contained in:
Linus Torvalds 2013-12-05 09:53:59 -08:00
commit da1965d353
5 changed files with 9 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/pinctrl/pinctrl-abx500.c
View File

@ -418,7 +418,7 @@ static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
ret = abx500_gpio_set_bits(chip,
AB8500_GPIO_ALTFUN_REG,
af.alt_bit1,
!!(af.alta_val && BIT(0)));
!!(af.alta_val & BIT(0)));
if (ret < 0)
goto out;
@ -439,7 +439,7 @@ static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
goto out;
ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
af.alt_bit1, !!(af.altb_val && BIT(0)));
af.alt_bit1, !!(af.altb_val & BIT(0)));
if (ret < 0)
goto out;
@ -462,7 +462,7 @@ static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
goto out;
ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
af.alt_bit2, !!(af.altc_val && BIT(1)));
af.alt_bit2, !!(af.altc_val & BIT(1)));
break;
default:

2
drivers/pinctrl/pinctrl-abx500.h
View File

@ -1,4 +1,4 @@
#ifndef PINCTRL_PINCTRL_ABx5O0_H
#ifndef PINCTRL_PINCTRL_ABx500_H
#define PINCTRL_PINCTRL_ABx500_H
/* Package definitions */

5
drivers/pinctrl/pinctrl-rockchip.c
View File

@ -504,6 +504,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
data |= (3 << bit);
break;
default:
spin_unlock_irqrestore(&bank->slock, flags);
dev_err(info->dev, "unsupported pull setting %d\n",
pull);
return -EINVAL;
@ -1453,8 +1454,8 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
if (ctrl->type == RK3188) {
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
info->reg_pull = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(info->reg_base))
return PTR_ERR(info->reg_base);
if (IS_ERR(info->reg_pull))
return PTR_ERR(info->reg_pull);
}
ret = rockchip_gpiolib_register(pdev, info);

2
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
View File

@ -3720,7 +3720,7 @@ static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
const struct r8a7740_portcr_group *group =
&r8a7740_portcr_offsets[i];
if (i <= group->end_pin)
if (pin <= group->end_pin)
return pfc->window->virt + group->offset + pin;
}

2
drivers/pinctrl/sh-pfc/pfc-sh7372.c
View File

@ -2584,7 +2584,7 @@ static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
const struct sh7372_portcr_group *group =
&sh7372_portcr_offsets[i];
if (i <= group->end_pin)
if (pin <= group->end_pin)
return pfc->window->virt + group->offset + pin;
}