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drm/xe: Fake pulling gt->info.engine_mask from hwconfig blob

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The blob doesn't fully support this yet, so fake for now to ensure our
driver load order is correct.

Once the blob supports pulling gt->info.engine_mask from the blob, this
patch can be removed.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matthew Brost 2023-01-12 17:25:30 -05:00 committed by Rodrigo Vivi
parent 60694edf66
commit da34c2cf85
3 changed files with 11 additions and 2 deletions
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3
drivers/gpu/drm/xe/xe_gt.c
View File

@ -450,6 +450,9 @@ static int gt_fw_domain_init(struct xe_gt *gt)
if (err)
goto err_force_wake;
/* XXX: Fake that we pull the engine mask from hwconfig blob */
gt->info.engine_mask = gt->info.__engine_mask;
/* Enables per hw engine IRQs */
xe_gt_irq_postinstall(gt);

6
drivers/gpu/drm/xe/xe_gt_types.h
View File

@ -93,6 +93,12 @@ struct xe_gt {
u32 clock_freq;
/** @engine_mask: mask of engines present on GT */
u64 engine_mask;
/**
* @__engine_mask: mask of engines present on GT read from
* xe_pci.c, used to fake reading the engine_mask from the
* hwconfig blob.
*/
u64 __engine_mask;
} info;
/**

4
drivers/gpu/drm/xe/xe_pci.c
View File

@ -420,13 +420,13 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (id == 0) {
gt->info.type = XE_GT_TYPE_MAIN;
gt->info.vram_id = id;
gt->info.engine_mask = desc->platform_engine_mask;
gt->info.__engine_mask = desc->platform_engine_mask;
gt->mmio.adj_limit = 0;
gt->mmio.adj_offset = 0;
} else {
gt->info.type = desc->extra_gts[id - 1].type;
gt->info.vram_id = desc->extra_gts[id - 1].vram_id;
gt->info.engine_mask =
gt->info.__engine_mask =
desc->extra_gts[id - 1].engine_mask;
gt->mmio.adj_limit =
desc->extra_gts[id - 1].mmio_adj_limit;