powerpc/mpc85xx: move ptp timer out of fman in dts
This patch is to move ptp timer node out of fman. Because ptp timer will be probed by ptp_qoriq driver, it should be an independent device in case of conflict memory mapping. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -37,12 +37,13 @@ fman0: fman@400000 {
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#size-cells = <1>;
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cell-index = <0>;
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compatible = "fsl,fman";
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ranges = <0 0x400000 0x100000>;
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reg = <0x400000 0x100000>;
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ranges = <0 0x400000 0xfe000>;
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reg = <0x400000 0xfe000>;
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interrupts = <96 2 0 0>, <16 2 1 1>;
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clocks = <&clockgen 3 0>;
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clock-names = "fmanclk";
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fsl,qman-channel-range = <0x40 0xc>;
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ptimer-handle = <&ptp_timer0>;
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muram@0 {
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compatible = "fsl,fman-muram";
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@ -93,9 +94,10 @@ fman0: fman@400000 {
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reg = <0x87000 0x1000>;
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status = "disabled";
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};
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ptp_timer0: ptp-timer@fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0xfe000 0x1000>;
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};
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};
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ptp_timer0: ptp-timer@4fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0x4fe000 0x1000>;
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interrupts = <96 2 0 0>;
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};
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@ -37,12 +37,13 @@ fman1: fman@500000 {
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#size-cells = <1>;
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cell-index = <1>;
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compatible = "fsl,fman";
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ranges = <0 0x500000 0x100000>;
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reg = <0x500000 0x100000>;
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ranges = <0 0x500000 0xfe000>;
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reg = <0x500000 0xfe000>;
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interrupts = <97 2 0 0>, <16 2 1 0>;
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clocks = <&clockgen 3 1>;
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clock-names = "fmanclk";
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fsl,qman-channel-range = <0x60 0xc>;
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ptimer-handle = <&ptp_timer1>;
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muram@0 {
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compatible = "fsl,fman-muram";
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@ -93,9 +94,10 @@ fman1: fman@500000 {
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reg = <0x87000 0x1000>;
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status = "disabled";
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};
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ptp_timer1: ptp-timer@fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0xfe000 0x1000>;
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};
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};
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ptp_timer1: ptp-timer@5fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0x5fe000 0x1000>;
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interrupts = <97 2 0 0>;
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};
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@ -37,12 +37,13 @@ fman0: fman@400000 {
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#size-cells = <1>;
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cell-index = <0>;
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compatible = "fsl,fman";
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ranges = <0 0x400000 0x100000>;
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reg = <0x400000 0x100000>;
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ranges = <0 0x400000 0xfe000>;
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reg = <0x400000 0xfe000>;
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interrupts = <96 2 0 0>, <16 2 1 1>;
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clocks = <&clockgen 3 0>;
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clock-names = "fmanclk";
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fsl,qman-channel-range = <0x800 0x10>;
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ptimer-handle = <&ptp_timer0>;
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muram@0 {
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compatible = "fsl,fman-muram";
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@ -98,9 +99,10 @@ fman0: fman@400000 {
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compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
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reg = <0xfd000 0x1000>;
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};
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ptp_timer0: ptp-timer@fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0xfe000 0x1000>;
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};
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};
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ptp_timer0: ptp-timer@4fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0x4fe000 0x1000>;
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interrupts = <96 2 0 0>;
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};
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@ -37,12 +37,13 @@ fman1: fman@500000 {
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#size-cells = <1>;
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cell-index = <1>;
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compatible = "fsl,fman";
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ranges = <0 0x500000 0x100000>;
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reg = <0x500000 0x100000>;
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ranges = <0 0x500000 0xfe000>;
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reg = <0x500000 0xfe000>;
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interrupts = <97 2 0 0>, <16 2 1 0>;
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clocks = <&clockgen 3 1>;
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clock-names = "fmanclk";
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fsl,qman-channel-range = <0x820 0x10>;
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ptimer-handle = <&ptp_timer1>;
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muram@0 {
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compatible = "fsl,fman-muram";
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@ -98,9 +99,10 @@ fman1: fman@500000 {
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compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
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reg = <0xfd000 0x1000>;
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};
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ptp_timer1: ptp-timer@fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0xfe000 0x1000>;
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};
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};
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ptp_timer1: ptp-timer@5fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0x5fe000 0x1000>;
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interrupts = <97 2 0 0>;
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};
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@ -37,12 +37,13 @@ fman0: fman@400000 {
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#size-cells = <1>;
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cell-index = <0>;
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compatible = "fsl,fman";
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ranges = <0 0x400000 0x100000>;
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reg = <0x400000 0x100000>;
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ranges = <0 0x400000 0xfe000>;
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reg = <0x400000 0xfe000>;
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interrupts = <96 2 0 0>, <16 2 1 1>;
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clocks = <&clockgen 3 0>;
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clock-names = "fmanclk";
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fsl,qman-channel-range = <0x800 0x10>;
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ptimer-handle = <&ptp_timer0>;
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muram@0 {
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compatible = "fsl,fman-muram";
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@ -86,9 +87,10 @@ fman0: fman@400000 {
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compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
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reg = <0xfd000 0x1000>;
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};
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ptp_timer0: ptp-timer@fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0xfe000 0x1000>;
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};
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};
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ptp_timer0: ptp-timer@4fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0x4fe000 0x1000>;
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interrupts = <96 2 0 0>;
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};
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