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mt76: sdio: extend sdio module to support CONNAC2

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Extend sdio module to support CONNAC2 hw that mt7921s rely on.

Tested-by: Deren Wu <deren.wu@mediatek.com>
Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Co-developed-by: Deren Wu <deren.wu@mediatek.com>
Signed-off-by: Deren Wu <deren.wu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Sean Wang 2021-10-19 07:11:42 +08:00 committed by Felix Fietkau
parent 3ad0850934
commit dacf0acfe2
5 changed files with 53 additions and 6 deletions
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4
drivers/net/wireless/mediatek/mt76/mt76.h
View File

@ -506,6 +506,7 @@ struct mt76_sdio {
struct sdio_func *func;
void *intr_data;
u8 hw_ver;
struct {
int pse_data_quota;
@ -1253,7 +1254,8 @@ int mt76s_alloc_tx(struct mt76_dev *dev);
void mt76s_deinit(struct mt76_dev *dev);
void mt76s_sdio_irq(struct sdio_func *func);
void mt76s_txrx_worker(struct mt76_sdio *sdio);
int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func);
int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func,
int hw_ver);
u32 mt76s_rr(struct mt76_dev *dev, u32 offset);
void mt76s_wr(struct mt76_dev *dev, u32 offset, u32 val);
u32 mt76s_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);

2
drivers/net/wireless/mediatek/mt76/mt7615/sdio.c
View File

@ -120,7 +120,7 @@ static int mt7663s_probe(struct sdio_func *func,
if (ret < 0)
goto error;
ret = mt76s_hw_init(mdev, func);
ret = mt76s_hw_init(mdev, func, MT76_CONNAC_SDIO);
if (ret)
goto error;

23
drivers/net/wireless/mediatek/mt76/sdio.c
View File

@ -221,11 +221,13 @@ int mt76s_rd_rp(struct mt76_dev *dev, u32 base,
}
EXPORT_SYMBOL_GPL(mt76s_rd_rp);
int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func)
int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func, int hw_ver)
{
u32 status, ctrl;
int ret;
dev->sdio.hw_ver = hw_ver;
sdio_claim_host(func);
ret = sdio_enable_func(func);
@ -255,12 +257,27 @@ int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func)
goto disable_func;
ctrl = WHIER_RX0_DONE_INT_EN | WHIER_TX_DONE_INT_EN;
if (hw_ver == MT76_CONNAC2_SDIO)
ctrl |= WHIER_RX1_DONE_INT_EN;
sdio_writel(func, ctrl, MCR_WHIER, &ret);
if (ret < 0)
goto disable_func;
/* set WHISR as read clear and Rx aggregation number as 16 */
ctrl = FIELD_PREP(MAX_HIF_RX_LEN_NUM, 16);
switch (hw_ver) {
case MT76_CONNAC_SDIO:
/* set WHISR as read clear and Rx aggregation number as 16 */
ctrl = FIELD_PREP(MAX_HIF_RX_LEN_NUM, 16);
break;
default:
ctrl = sdio_readl(func, MCR_WHCR, &ret);
if (ret < 0)
goto disable_func;
ctrl &= ~MAX_HIF_RX_LEN_NUM_CONNAC2;
ctrl &= ~W_INT_CLR_CTRL; /* read clear */
ctrl |= FIELD_PREP(MAX_HIF_RX_LEN_NUM_CONNAC2, 0);
break;
}
sdio_writel(func, ctrl, MCR_WHCR, &ret);
if (ret < 0)
goto disable_func;

23
drivers/net/wireless/mediatek/mt76/sdio.h
View File

@ -21,7 +21,12 @@
#define MCR_WHCR 0x000C
#define W_INT_CLR_CTRL BIT(1)
#define RECV_MAILBOX_RD_CLR_EN BIT(2)
#define WF_SYS_RSTB BIT(4) /* supported in CONNAC2 */
#define WF_WHOLE_PATH_RSTB BIT(5) /* supported in CONNAC2 */
#define WF_SDIO_WF_PATH_RSTB BIT(6) /* supported in CONNAC2 */
#define MAX_HIF_RX_LEN_NUM GENMASK(13, 8)
#define MAX_HIF_RX_LEN_NUM_CONNAC2 GENMASK(14, 8) /* supported in CONNAC2 */
#define WF_RST_DONE BIT(15) /* supported in CONNAC2 */
#define RX_ENHANCE_MODE BIT(16)
#define MCR_WHISR 0x0010
@ -29,6 +34,7 @@
#define WHIER_D2H_SW_INT GENMASK(31, 8)
#define WHIER_FW_OWN_BACK_INT_EN BIT(7)
#define WHIER_ABNORMAL_INT_EN BIT(6)
#define WHIER_WDT_INT_EN BIT(5) /* supported in CONNAC2 */
#define WHIER_RX1_DONE_INT_EN BIT(2)
#define WHIER_RX0_DONE_INT_EN BIT(1)
#define WHIER_TX_DONE_INT_EN BIT(0)
@ -100,6 +106,23 @@
#define MCR_SWPCDBGR 0x0154
#define MCR_H2DSM2R 0x0160 /* supported in CONNAC2 */
#define MCR_H2DSM3R 0x0164 /* supported in CONNAC2 */
#define MCR_D2HRM3R 0x0174 /* supported in CONNAC2 */
#define MCR_WTQCR8 0x0190 /* supported in CONNAC2 */
#define MCR_WTQCR9 0x0194 /* supported in CONNAC2 */
#define MCR_WTQCR10 0x0198 /* supported in CONNAC2 */
#define MCR_WTQCR11 0x019C /* supported in CONNAC2 */
#define MCR_WTQCR12 0x01A0 /* supported in CONNAC2 */
#define MCR_WTQCR13 0x01A4 /* supported in CONNAC2 */
#define MCR_WTQCR14 0x01A8 /* supported in CONNAC2 */
#define MCR_WTQCR15 0x01AC /* supported in CONNAC2 */
enum mt76_connac_sdio_ver {
MT76_CONNAC_SDIO,
MT76_CONNAC2_SDIO,
};
struct mt76s_intr {
u32 isr;
u32 *rec_mb;

7
drivers/net/wireless/mediatek/mt76/sdio_txrx.c
View File

@ -112,8 +112,10 @@ mt76s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid,
for (i = 0; i < intr->rx.num[qid]; i++) {
int index = (q->head + i) % q->ndesc;
struct mt76_queue_entry *e = &q->entry[index];
__le32 *rxd = (__le32 *)buf;
len = intr->rx.len[qid][i];
/* parse rxd to get the actual packet length */
len = FIELD_GET(GENMASK(15, 0), le32_to_cpu(rxd[0]));
e->skb = mt76s_build_rx_skb(buf, len, round_up(len + 4, 4));
if (!e->skb)
break;
@ -173,6 +175,9 @@ mt76s_tx_pick_quota(struct mt76_sdio *sdio, bool mcu, int buf_sz,
pse_sz = DIV_ROUND_UP(buf_sz + sdio->sched.deficit, MT_PSE_PAGE_SZ);
if (mcu && sdio->hw_ver == MT76_CONNAC2_SDIO)
pse_sz = 1;
if (mcu) {
if (sdio->sched.pse_mcu_quota < *pse_size + pse_sz)
return -EBUSY;