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Hexagon: add support for additional exceptions

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Add multi-reg-write and unaligned-PC exceptions.

Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
This commit is contained in:
Richard Kuo 2012-10-28 19:54:37 -05:00
parent 20f704b69a
commit db0fe532db
1 changed files with 10 additions and 0 deletions
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10
arch/hexagon/kernel/traps.c
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@ -65,6 +65,10 @@ static const char *ex_name(int ex)
return "Write protection fault";
case HVM_GE_C_XMAL:
return "Misaligned instruction";
case HVM_GE_C_WREG:
return "Multiple writes to same register in packet";
case HVM_GE_C_PCAL:
return "Program counter values that are not properly aligned";
case HVM_GE_C_RMAL:
return "Misaligned data load";
case HVM_GE_C_WMAL:
@ -324,6 +328,12 @@ void do_genex(struct pt_regs *regs)
case HVM_GE_C_XMAL:
misaligned_instruction(regs);
break;
case HVM_GE_C_WREG:
illegal_instruction(regs);
break;
case HVM_GE_C_PCAL:
misaligned_instruction(regs);
break;
case HVM_GE_C_RMAL:
misaligned_data_load(regs);
break;