From 9e71bc33ae0d402b1579dc7a7afb3916dd35cb17 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Mon, 16 May 2022 16:06:10 +0800 Subject: [PATCH 1/3] ASoC: fsl_sai: Add support for i.MX8MM On i.MX8MM the max register is FSL_SAI_MCTL, which is different with previous platform, so add max_register in soc data to distinguish platforms. And add specific soc data for i.MX8MM Signed-off-by: Shengjiu Wang Reviewed-by: Fabio Estevam Link: https://lore.kernel.org/r/1652688372-10274-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl_sai.c | 17 +++++++++++++++++ sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 18 insertions(+) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index ffc24afb5a7a..1ac65de094b9 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -1203,6 +1203,7 @@ static const struct fsl_sai_soc_data fsl_sai_vf610_data = { .reg_offset = 0, .mclk0_is_mclk1 = false, .flags = 0, + .max_register = FSL_SAI_RMR, }; static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { @@ -1213,6 +1214,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { .reg_offset = 0, .mclk0_is_mclk1 = true, .flags = 0, + .max_register = FSL_SAI_RMR, }; static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { @@ -1223,6 +1225,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { .reg_offset = 8, .mclk0_is_mclk1 = false, .flags = PMQOS_CPU_LATENCY, + .max_register = FSL_SAI_RMR, }; static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { @@ -1233,6 +1236,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { .reg_offset = 8, .mclk0_is_mclk1 = false, .flags = 0, + .max_register = FSL_SAI_RMR, }; static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { @@ -1243,6 +1247,18 @@ static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { .reg_offset = 0, .mclk0_is_mclk1 = false, .flags = 0, + .max_register = FSL_SAI_RMR, +}; + +static const struct fsl_sai_soc_data fsl_sai_imx8mm_data = { + .use_imx_pcm = true, + .use_edma = false, + .fifo_depth = 128, + .reg_offset = 8, + .mclk0_is_mclk1 = false, + .pins = 8, + .flags = 0, + .max_register = FSL_SAI_MCTL, }; static const struct of_device_id fsl_sai_ids[] = { @@ -1252,6 +1268,7 @@ static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,imx7ulp-sai", .data = &fsl_sai_imx7ulp_data }, { .compatible = "fsl,imx8mq-sai", .data = &fsl_sai_imx8mq_data }, { .compatible = "fsl,imx8qm-sai", .data = &fsl_sai_imx8qm_data }, + { .compatible = "fsl,imx8mm-sai", .data = &fsl_sai_imx8mm_data }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_sai_ids); diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index 7310fd02cc3c..e4965efe6102 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -223,6 +223,7 @@ struct fsl_sai_soc_data { unsigned int pins; unsigned int reg_offset; unsigned int flags; + unsigned int max_register; }; /** From 2530c5e875eab853125265b4f24a69e042d9580b Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Mon, 16 May 2022 16:06:11 +0800 Subject: [PATCH 2/3] ASoC: fsl_sai: Add support for i.MX8M Plus Add i.MX8M Plus specific soc data, the max register is FSL_SAI_MDIV. Signed-off-by: Shengjiu Wang Reviewed-by: Fabio Estevam Link: https://lore.kernel.org/r/1652688372-10274-3-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl_sai.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 1ac65de094b9..b528722acd65 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -1261,6 +1261,17 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mm_data = { .max_register = FSL_SAI_MCTL, }; +static const struct fsl_sai_soc_data fsl_sai_imx8mp_data = { + .use_imx_pcm = true, + .use_edma = false, + .fifo_depth = 128, + .reg_offset = 8, + .mclk0_is_mclk1 = false, + .pins = 8, + .flags = 0, + .max_register = FSL_SAI_MDIV, +}; + static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,vf610-sai", .data = &fsl_sai_vf610_data }, { .compatible = "fsl,imx6sx-sai", .data = &fsl_sai_imx6sx_data }, @@ -1269,6 +1280,7 @@ static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,imx8mq-sai", .data = &fsl_sai_imx8mq_data }, { .compatible = "fsl,imx8qm-sai", .data = &fsl_sai_imx8qm_data }, { .compatible = "fsl,imx8mm-sai", .data = &fsl_sai_imx8mm_data }, + { .compatible = "fsl,imx8mp-sai", .data = &fsl_sai_imx8mp_data }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_sai_ids); From af0bd3c0ffae8c11790ab0108787c03767869a9a Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Mon, 16 May 2022 16:06:12 +0800 Subject: [PATCH 3/3] ASoC: fsl_sai: Add support for i.MX8ULP Add i.MX8ULP specific soc data, the max register is FSL_SAI_RTCAP the IP version is also 0x0301, So version can't be used for the condition of register FSL_SAI_MCTL setting. Signed-off-by: Shengjiu Wang Reviewed-by: Fabio Estevam Link: https://lore.kernel.org/r/1652688372-10274-4-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl_sai.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index b528722acd65..fa950dde5310 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -1147,7 +1147,7 @@ static int fsl_sai_probe(struct platform_device *pdev) /* Select MCLK direction */ if (of_find_property(np, "fsl,sai-mclk-direction-output", NULL) && - sai->verid.version >= 0x0301) { + sai->soc_data->max_register >= FSL_SAI_MCTL) { regmap_update_bits(sai->regmap, FSL_SAI_MCTL, FSL_SAI_MCTL_MCLK_EN, FSL_SAI_MCTL_MCLK_EN); } @@ -1272,6 +1272,17 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mp_data = { .max_register = FSL_SAI_MDIV, }; +static const struct fsl_sai_soc_data fsl_sai_imx8ulp_data = { + .use_imx_pcm = true, + .use_edma = true, + .fifo_depth = 16, + .reg_offset = 8, + .mclk0_is_mclk1 = false, + .pins = 4, + .flags = PMQOS_CPU_LATENCY, + .max_register = FSL_SAI_RTCAP, +}; + static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,vf610-sai", .data = &fsl_sai_vf610_data }, { .compatible = "fsl,imx6sx-sai", .data = &fsl_sai_imx6sx_data }, @@ -1281,6 +1292,7 @@ static const struct of_device_id fsl_sai_ids[] = { { .compatible = "fsl,imx8qm-sai", .data = &fsl_sai_imx8qm_data }, { .compatible = "fsl,imx8mm-sai", .data = &fsl_sai_imx8mm_data }, { .compatible = "fsl,imx8mp-sai", .data = &fsl_sai_imx8mp_data }, + { .compatible = "fsl,imx8ulp-sai", .data = &fsl_sai_imx8ulp_data }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_sai_ids);